Soung-Hoon Sim

A 130-nm 0.9-V 66-MHz 8-Mb (256K /spl times/ 32) local SONOS embedded flash EEPROM

In a 0.13-/spl mu/m CMOS logic compatible process, a 256K /spl times/ 32 bit (8 Mb) local SONOS embedded flash EEPROM was implemented using the ATD-assisted current sense amplifier (AACSA) for 0.9 V (0.7 /spl sim/ 1.4 V) low V/sub CC/ application. Read operation is performed at a high frequency of 66 MHz and shows a low current of typically 5 mA at 66-MHz operating frequency. Program operation is performed for common source array with wide I/Os (/spl times/32) by using the data-dependent source bias control scheme (DDSBCS). This novel local SONOS embedded flash EEPROM core has the cell size of 0.276 /spl mu/m/sup 2/ (16.3 F/sup 2//bit) and the program and erase time of 20 /spl mu/s and 20 ms, respectively.

A 0.9V 66MHz access, 0.13um 8M(256K/spl times/32) local SONOS embedded flash EEPROM

In 0.13 /spl mu/m CMOS logic compatible process, we implemented 256K/spl times/32bit(8Mb) SONOS embedded flash EEPROM using ATD-assisted Current Sense Amplifier (AACSA) for 0.9V(0.7V/spl sim/1.4V) low V/sub CC/ application. Read operation is performed at a high frequency of 66MHz and shows a low current of typically 5mA at 66MHz operating frequency. Program operation is performed for common source array with wide I/Os(X32) by using Data-dependent Source Bias Control Scheme (DDSBCS). This novel SONOS embedded Flash EEPROM core has the cell size of 0.276um/sup 2/ and the program and erase time of 20us and 20ms respectively.