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Dive into the research topics where Srikrishna Sitaraman is active.

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Featured researches published by Srikrishna Sitaraman.


electronic components and technology conference | 2002

Role of dielectric material and geometry on the thermo-mechanical reliability of microvias

Gnyaneshwar Ramakrishna; Fuhan Liu; Srikrishna Sitaraman

A comprehensive experimental and theoretical program is underway at the Georgia Institute of Technology to develop microvia substrate technology. The experimental aspect of this program involves fabrication in a class 1000 clean room facility to understand the effect of process parameters on yield and reliability of the microvia and high density wiring (HDW) structures. The theoretical program aims to understand the mechanics of deformation and thus predict and enhance the reliability of the HDW structures. The focus of this paper is to understand the effect of processing parameters on yield, to characterize the effect of microvia geometry parameters on the evolution of strain, and to determine the effect of dielectric material properties on the thermo-mechanical reliability of the microvias. Finite element simulations were carried out with different microvia diameters to understand the failure mechanisms of these structures. The reliability predictions are compared with thermal cycling test data of the test vehicles.


electronic components and technology conference | 2000

Numerical and experimental investigations of large IC flip chip attach

Andreas Schubert; R. Dudek; R. Leutenbauer; P. Coskina; K.-F. Becker; J. Kloeser; B. Michel; H. Reichl; Daniel F. Baldwin; Jianmin Qu; Srikrishna Sitaraman; Ching-Ping Wong; Rao Tummala

Because flip chips can achieve high electrical interconnect speed, high density, and low profiles, a team from the Fraunhofer Institute for Reliability and Microintegration in Berlin and from Georgia Tech undertake a study examining the extreme limits of flip chip input/output (I/O) capabilities and physical dimensions. Their starting point is a SIA estimate of memory requirements, based on Moores Law, for the year 2012. In order to study the limitations of flip chip technology the groups are working on both, advanced thermomechanical simulation and hands-on interconnection technology resulting in the design of four flip chips. They have the dimensions of 10/spl times/10 mm/sup 2/, 20/spl times/20 mm/sup 2/, 30/spl times/30 mm/sup 2/, and 40/spl times/40 mm/sup 2/. With these designs both, the simulation and the interconnection technology departments of Fraunhofer IZM start to evaluate the feasibility of flip chips beyond 20/spl times/20 mm/sup 2/.


electronic components and technology conference | 2013

Ultra-miniaturized and surface-mountable glass-based 3D IPAC packages for RF modules

Yoichiro Sato; Srikrishna Sitaraman; Vijay Sukumaran; Bruce Chou; Junki Min; Motoshi Ono; Choukri Karoui; Franck Dosseul; Christian Nopper; Madhavan Swaminathan; Venky Sundaram; Rao Tummala

This paper demonstrates ultra-miniaturized RF passive components integrated on thin glass substrate with small Through Package Vias (TPVs) to realize 3D Integrated Passive and Actives Component (IPAC) concept. Miniaturization is achieved through; a) ultra-thin glass, b) low-loss thin dielectrics and c) small TPVs. Inductors, capacitors and low pass filters functioning in the frequency range of 0.8 GHz to 5.4 GHz were modeled and fabricated between thin dielectric layers on 100 μm thin glass, and then assembled on PCB through BGA interconnections. The simulated results corroborated well with measured results, providing guidelines for RF module fabrication.


IEEE Transactions on Components, Packaging and Manufacturing Technology | 2016

Design and Demonstration of Power Delivery Networks With Effective Resonance Suppression in Double-Sided 3-D Glass Interposer Packages

Gokul Kumar; Srikrishna Sitaraman; Jonghyun Cho; Venky Sundaram; Joungho Kim; Rao Tummala

Ultrathin 3-D glass interposers with throughpackage vias at the same pitch as through-silicon vias (TSVs) have been proposed as a simpler and cheaper alternative to the direct 3-D stacking of logic and memory devices. Such 3-D interposers provide wide-I/O channels for high signal bandwidth (BW) between the logic device on one side of the interposer and memory stack on the other side, without the use of complex TSVs in the logic die. However, this configuration introduces power delivery design challenges due to resonance from: 1) the low-loss property of the glass substrate and 2) the parasitic inductance due to additional length from lateral power delivery path. This paper presents for the first time, the design and demonstration of power delivery networks (PDNs) in 30-μm thin, 3-D double-sided glass interposers, by suppressing the noise from mode resonances. The self-impedance of the 3-D glass interposer PDN was simulated using electromagnetic solvers, including printed-wiring-board and chip-level models. The 3-D PDN was compared with that of the 2-D glass packages having fully populated ball grid array connections. The resonance mechanism for each configuration was studied in detail, and the corresponding PDN loop inductances were evaluated. High impedance peaks in addition to the 2-D PDN were observed at high frequencies (near 7.3 GHz) in the 3-D interposer structure due to the increased inductances from lateral power delivery. This paper proposes and evaluates three important resonance suppression techniques based on: 1) 3-D interposer die configuration; 2) the selection and placement of decoupling capacitors; and 3) 3-D interposer package power and ground stack-up. Two-metal and four-metal layer test vehicles were fabricated on 30and 100-μm thick panel-based glass substrates, respectively, to validate the modeling and analysis of the proposed approach. The PDN test structures were characterized up to 20 GHz for plane resonances and network impedances, with good model-to-hardware correlation. The results in this paper suggest that the ultrathin 3-D interposer PDN structure can be effectively designed to meet the target impedance guidelines for high-BW applications, providing a compelling alternative to 3-D-IC stacking with the TSVs.


international conference on nanotechnology | 2014

Tunable and Miniaturized RF Components with Nanocomposite and Nanolayered Dielectrics

P. Markondeya Raj; Parthasarathi Chakraborti; Himani Sharma; Kyuhwan Han; Saumya Gandhi; Srikrishna Sitaraman; Madhavan Swaminathan; Rao Tummala

Nanocomposite and nanolayered dielectrics provide new avenues to enhance the performance of RF and power components. They enable engineering of properties such as permeability, permittivity, frequency-and temperature-stability, and tunability, along with low loss, to miniaturize next-generation multiband RF modules that require higher functional density and improved performance. This paper demonstrates two such advances in nanodielectrics: 1.) Magnetic nanocomposites for miniaturization of antennas, metamaterials and other RF components, 2.) Nanolayered stack dielectrics for tunable RF components with temperature- and frequency-stability and low loss. The materials design, synthesis, processing and characterization to demonstrate the superior properties are presented.


electronic components and technology conference | 2013

Power delivery network analysis of 3D double-side glass interposers for high bandwidth applications

Gokul Kumar; Srikrishna Sitaraman; Jonghyun Cho; Sung Jin Kim; Venky Sundaram; Joungho Kim; Rao Tummala

Logic-to-memory interconnections by double-side mounting on ultra-thin 3D glass interposers with Through-Package-Vias (TPVs) achieves high bandwidth (BW) (>25.6GB per second), without the complex TSV processes in logic ICs, required for wide I/O 3D-IC stack. While this interposer/packaging technology offers several advantages including power delivery by enabling thick power-ground (P/G) planes, the power distribution network (PDN) challenges such as resonances must be addressed. This paper investigates the impedance characteristics of PDN in 3D glass interposers at chip, interposer, package, and board-levels. The resonance characteristics of power and ground planes in ultra-thin glass packages are compared with other interposer technologies through 3D EM simulations with variations in core thickness. Test vehicles fabricated with 10×10mm power-ground plane pairs on ultra-thin 30μm glass samples were characterized for primary resonance modes, with good model-to-hardware correlation. Self-impedance (Z11) was studied with variations in (a) number of power and ground BGA interconnections, (b) power and ground path distance, and (c) placement of decoupling capacitors. In all these three cases, the contribution of increased package-level loop inductance to total system level impedance (on-chip + interposer/package + PWB PDN) was shown to be minimal. Thus, through a combination of integrated power and ground planes, decoupling capacitors, and optimal power-ground BGA interconnection placements, ultra-thin 3D glass interposers can achieve the target impedance guidelines for high BW systems.


IEEE Transactions on Electromagnetic Compatibility | 2016

Measurement and Analysis of Glass Interposer Power Distribution Network Resonance Effects on a High-Speed Through Glass Via Channel

Youngwoo Kim; Jonghyun Cho; Jonghoon Kim; Kiyeong Kim; Kyungjun Cho; Subin Kim; Srikrishna Sitaraman; Venky Sundaram; P.M. Raj; Rao Tummala; Joungho Kim

In this paper, we measured and analyzed glass interposer power distribution network (PDN) resonance effects on a high-speed through glass via (TGV) channel for the first time. To verify the glass interposer PDN resonance effects on the TGV channel, glass interposer test vehicles were fabricated. With these test vehicles, glass interposer PDN impedance, channel loss, far-end crosstalk, and eye diagram are measured. Based on these measurements, glass interposer PDN resonance effects on the signal integrity of the high-speed TGV channel are analyzed. Due to low loss of the glass substrate, sharp high PDN impedance peaks are generated at the resonance frequencies. High PDN impedance peaks at the PDN resonance frequencies, which affect return current of the TGV channel, increase channel loss, crosstalks, and PDN noise coupling in the frequency domain and degrade eye diagram in the time domain. To suppress these glass interposer PDN resonance effects, a ground shielded-TGV scheme is proposed. The proposed ground shielded-TGV scheme includes two ground TGVs 200 μm away from the signal TGV considering the design rules and includes package ground underneath the glass interposer. Effectiveness of the suggested grounding scheme on the resonance effects suppression is verified with three-dimensional electromagnetic simulation. The proposed shielded-TGV design successfully suppressed the glass interposer PDN resonance effects that results in the suppression of insertion loss, shielding of the crosstalk, and improvement of the eye diagram of the high-speed TGV channel.


Archive | 2015

Novel Nanostructured Passives for RF and Power Applications: Nanopackaging with Passive Components

P. Markondeya Raj; Parthasarathi Chakraborti; Dibyajat Mishra; Himani Sharma; Saumya Gandhi; Srikrishna Sitaraman; Rao Tummala

Miniaturization of passive components, while mounting them close to the active devices to form ultrathin high-performance power and RF modules, is a key enabler for next-generation multifunctional miniaturized systems. Traditional microscale materials do not lead to adequate enhancement in volumetric densities to miniaturize passive components as thin films or thin integrated passive devices. With these materials, component miniaturization also degrades performance metrics such as quality factor, leakage current, tolerance, and stability. Nanomaterials such as nanocomposite dielectrics and magneto-dielectrics, nanostructured electrodes, and the resulting thin-film components have the potential to address this challenge. This chapter describes the key opportunities in nanomaterials and nanostructures for power and RF passive components. The first part of this chapter describes the role of nanostructured materials for high-density capacitors and inductors in power modules. The second part of the chapter describes application of nanoscale materials as nanocomposite dielectrics and magneto-dielectrics with stable and high permeability and permittivity for miniaturized RF modules.


electronic components and technology conference | 2012

Low cost system-in-package module using next generation low loss organic material

Yuya Suzuki; Srikrishna Sitaraman; Abhilash Goyal; Fuhan Liu; Nitesh Kumbhat; Masakazu Hashimoto; Ryota Mori; Toshihiko Jimbo; Venky Sundaram; Rao Tummala

Miniaturization of wireless sub-systems through high-density integration of actives and passives is in hour of need with the increasing demand for portable devices. Considering that a thin, planar form-factor is much sought-after for mobile devices, it is essential to shrink packages in terms of thickness. This paper presents, for the first time, super-thin, three-metal-layer WLAN LNA and receiver modules with chip-last embedding pioneered by Georgia Tech Packaging Research Center (GT-PRC). The modules composed of a thin organic core and an organic build up layer measure 130 um in thickness, which is smaller by a factor of nearly 10× compared to the conventional wire-bonding or flip-chip packages. Such miniaturization was primarily achieved by shrinking of embedded passives with the use of next generation material X-L (high Dk) with high dielectric constant. The modules were fabricated using conventional low cost process with the addition of cavity fabrication through laser ablation, followed by embedding of 100 um-thick GaAs dies. The receiver module was measured to have a gain of 9.2 dB at 2.4 GHz, and out-of-band rejection of nearly 30 dB at 2 GHz and 5 GHz.


electronic components and technology conference | 2015

Nanomagnetic structures for inductive coupling and shielding in wireless charging applications

Dibyajat Mishra; Srikrishna Sitaraman; Saumya Gandhi; Sun Teng; P.M. Raj; Himani Sharma; Rao Tummala; T. N. Arunagiri; Z. Dordi; Ravi Mullapudi

This paper presents materials modeling, design, processing, integration and characterization of a new class of nanomagnetic structures for coupling and shielding in wireless charging and power conversion applications. Wireless power transfer applications such as wireless charging, operating at 6.78 MHz, require high-performance magnetic materials for enhancing the coupling between transceiver and receiver coils as well as for suppressing electromagnetic interference (EMI) shielding. This research describes two novel magnetic structures for coupling inductors and ultra-thin EMI shields. A novel vertically aligned magnetic composite structure was demonstrated for the coupling inductor. This structure is shown to result in permeabilities of above 500 and loss tangent of 0.01, which enhances the coupling inductance by 3-5x at 6.78 MHz, and also enhances the power-transfer efficiency by 2x. The second part of this paper presents the modeling, design and fabrication of nanomagnetic structures for ultra-thin EMI shields in wireless power transfer applications. The ultra-thin EMI shields for wireless power transfer described in this research can achieve greater than 20dB attenuation at 6.78 MHz even for 3-5μm shield thickness.

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Rao Tummala

Georgia Institute of Technology

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Venky Sundaram

Georgia Institute of Technology

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P. Markondeya Raj

Georgia Institute of Technology

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Jonghyun Cho

Missouri University of Science and Technology

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Nitesh Kumbhat

Georgia Institute of Technology

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P.M. Raj

Georgia Institute of Technology

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Dibyajat Mishra

Georgia Institute of Technology

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Fuhan Liu

Georgia Institute of Technology

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Himani Sharma

Georgia Institute of Technology

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