Stephen M. Cea

A 90 nm logic technology featuring 50 nm strained silicon channel transistors, 7 layers of Cu interconnects, low k ILD, and 1 /spl mu/m/sup 2/ SRAM cell

A leading edge 90 nm technology with 1.2 nm physical gate oxide, 50 nm gate length, strained silicon, NiSi, 7 layers of Cu interconnects, and low k carbon-doped oxide (CDO) for high performance dense logic is presented. Strained silicon is used to increase saturated NMOS and PMOS drive currents by 10-20% and mobility by >50%. Aggressive design rules and unlanded contacts offer a 1.0 /spl mu/m/sup 2/ 6-T SRAM cell using 193 nm lithography.

Continuum based modeling of silicon integrated circuit processing: An object oriented approach

Continuum based integrated circuit process modeling is the dominant tool used to investigate and understand integrated circuit (IC) development. This paper describes the commonly used models for implantation, diffusion, and material growth. In addition, the supporting numerical techniques are described. This paper focuses on the implementation in object oriented code, Florida Object Oriented Process Simulator (FLOOPS). The software architecture is described for implementing models and numerics. A number of process examples are introduced and discussed.

Modeling of NMOS performance gains from edge dislocation stress

Stress from edge dislocations introduced by solid phase epitaxial regrowth increases as gate pitch is scaled, reaching 1GPa at 100nm gate pitch. This scaling trend makes edge dislocations attractive for future technology nodes, as stress from epitaxial and deposited film stressors reduces as pitch is scaled (1,2). We show a gate last flow is best for maximizing the dislocation stress, and the stress varies with layout and topography. We arrive at these results by the application of the finite element method to model the dislocation stress.

Does the low hole transport mass in 〈110〉 and 〈111〉 Si nanowires lead to mobility enhancements at high field and stress: A self-consistent tight-binding study

The hole surface roughness and phonon limited mobility in the silicon 〈100〉, 〈110〉, and 〈111〉 square nanowires under the technologically important conditions of applied gate bias and stress are studied with the self-consistent Poisson-sp3d5s*-SO tight-binding bandstructure method. Under an applied gate field, the hole carriers in a wire undergo a volume to surface inversion transition diminishing the positive effects of the high 〈110〉 and 〈111〉 valence band nonparabolicities, which are known to lead to the large gains of the phonon limited mobility at a zero field in narrow wires. Nonetheless, the hole mobility in the unstressed wires down to the 5 nm size remains competitive or shows an enhancement at high gate field over the large wire limit. Down to the studied 3 nm sizes, the hole mobility is degraded by strong surface roughness scattering in 〈100〉 and 〈110〉 wires. The 〈111〉 channels are shown to experience less surface scattering degradation. The physics of the surface roughness scattering dependence...

Modeling of ultrahighly doped shallow junctions for aggressively scaled CMOS

This paper presents an integrated modeling approach to address diffusion and activation challenges in sub-90 nm CMOS technology. Co-implants of F and Ge are shown to reduce diffusion rates and a new model for the interactive effects is presented. Complex codiffusion behavior of As and P is presented and modeling concepts elucidated. Tradeoffs such as sheet resistance for a given junction depth, and how these depend on impurities, as well as soak vs. spike rapid thermal anneals (RTA), can be understood with simulation models.

Molecular dynamics modeling of solid phase epitaxial regrowth

Solid phase epitaxial regrowth (SPER) is of great technological importance in semiconductor device fabrication. A better understanding and accurately modeling of its behavior are vital to the design of fabrication processes and the improvement of the device performance. In this paper, SPER was modeled by molecular dynamics (MD) with Tersoff potential. Extensive MD simulations were conducted to study the dependence of SPER rate on temperature, growth orientation, pressure, and uniaxial stress. The simulation data were fitted to empirical formula, and the results were compared with experimental data. It was concluded that MD with Tersoff potential can qualitatively describe the SPER process. For a more quantitatively accurate model, larger simulation systems and a better interatomic potential are needed.

Compressive Uniaxial Stress Bandstructure Engineering for Transferred-Hole Devices

The transport properties of holes in Si, Ge, and Si1-xGe under high compressive stresses are studied with a Monte Carlo simulation method. Stress significantly improves the low-energy mass and mobility, while its effect is diminished in the high-energy bandstructure. The transient behavior of the carrier velocity exhibits a double-overshoot peak at high driving field. This double-overshoot behavior is manifested in carrier-velocity profiles in simulated short-channel PMOS devices. In steady state at lower field, the hole velocity exceeds the saturation velocity at high field. This leads to a negative differential resistance effect in simulated resistors. We propose to use this effect, generic to cubic semiconductors, for transferred-hole devices. An advantage of this approach is that it can be integrated into the conventional stress-engineered Si or Ge logic process.

Assessment of Si/SiGe PMOS Schottky contacts through atomistic tight binding simulations: Can we achieve the 10 −9 Ω·cm? target?

With continuous shrinking of devices in accordance with Moores law, metal-semiconductor resistivity starts playing an important role for device performance. To meet ITRS target of 10−9 Ω·cm2 by 2023, it is important to evaluate the effect of different device parameters such as doping concentration, Schottky barrier height, strain and SiGe mole fraction on contact resistivity. In this work, such a resistivity study has been done on Si/SiGe PMOS contacts through 10-band atomistic tight binding quantum transport simulations. Optimum target values for barrier height as a function of doping concentration are obtained.