Su-Chul Kim

Synchronous burst semiconductor memory device

Memory architecture permitting selection of storage density after fabrication of active circuitry

Integrated circuit chips and wafers including on-chip test element group circuits, and methods of fabricating and testing same

Synchronous burst semiconductor memory device with parallel input/output data strobe clocks

Data transmission circuitry of a synchronous semiconductor memory device

Semiconductor memory with auto-tracking bit line precharge scheme

Semiconductor memory device testable with a single data rate and/or dual data rate pattern in a merged data input/output pin test mode

Programmable Digital On-Chip Terminator

Memory architecture permitting selection of die size after fabrication of active circuitry

Integrated circuit chip for consumer, commercial, industrial applications, has test element group circuit connected to test pad for measuring electrical characteristics of semiconductor devices of internal circuit