Suk-Kyoung Hong

Study on the resistive switching time of TiO2 thin films

The required time for voltage-pulse-induced resistive switching of 40-nm-thick TiO2 thin films integrated in a contact-type structure (Pt top and TiN bottom contact, contact area ∼0.07μm2) was studied as a function of pulse voltage. For off→on switching at least 2V was necessary and the minimum switching times were ∼20ns at 2V and ∼10ns at 3V. For on→off switching, a minimum switching time of 5μs was obtained at 2.5V. The resistance of the on-state device was also dependent on the switching voltage and time.

Imaging mechanism of piezoresponse force microscopy in capacitor structures

The image formation mechanism in piezoresponse force microscopy (PFM) of capacitor structures is analyzed. We demonstrate that the spatial resolution is a bilinear function of film and top electrode thicknesses and derive the corresponding analytical expressions. For many perovskites, the opposite contributions of d31 and d33 components can result in anomalous domain wall profiles. This analysis establishes the applicability limits of PFM for polarization dynamics studies in capacitors and applies them to other structural probes, including focused x-ray studies of capacitor structures.

Protection of SrBi2Ta2O9 ferroelectric capacitors from hydrogen damage by optimized metallization for memory applications

The degradation behavior of integrated Pt/SrBi2Ta2O9/Pt capacitors by hydrogen impregnation during the intermetal dielectric deposition and passivation is investigated. The hydrogen ions generated as a reaction byproduct from the SiH4-based deposition processes of the dielectric films induce reduction in the remanent polarization (Pr) as well as the imprint behavior of the small size capacitors (2×2 μm2). The degree of degradation is quite dependent on the size of the individual capacitors. The smaller capacitors underwent more serious degradation implying that the hydrogen ions impregnate into the SBT layer mainly along the etched side area of the capacitors not through the top Pt electrode. Metallization adopting TiN/Al/TiN/Ti multilayer is very effective in suppressing the hydrogen impregnation. In particular, the Ti layer appears to block the hydrogen penetration. Therefore, the optimized metallization scheme, wider metal lines than the top electrode area by 1 μm, successfully protects the integrated ...

Degradation behavior in the remnant polarization of SrBi2Ta2O9 thin films by hydrogen annealing and its recovery by postannealing

The degradation behavior in the remnant polarization (Pr) of sol–gel-derived SrBi2Ta2O9 (SBT) thin films, with Pt top and bottom electrodes, by annealing under a 5% H2/95% N2 atmosphere is investigated. The hydrogen annealing is performed at temperatures ranging from 250 to 480 °C. By annealing, the Pr drops to almost zero for all temperatures. Postannealing at temperatures higher than 700 °C under an air atmosphere recovers the Pr. Interestingly, the recovery is most ineffective for the sample annealed at the Curie temperature of the SBT films. A phenomenological model that explains this anomalous recovery behavior is presented.

Polarity-dependent rejuvenation of ferroelectric properties of integrated SrBi2Ta2O9 capacitors by electrical stressing

The electric-field-induced rejuvenation behavior of the degraded ferroelectric properties of integrated Pt/SrBi2Ti2O9/Pt capacitors was investigated. Integration processes, especially plasma-enhanced chemical vapor deposition of the passivation layers, generate hydrogen ions and electrons which act as domain pinning centers and a source of a negative internal electric field. Domain pinning was found to reduce the remanent polarization (Pr) and internal field that induces an imprint to the positive bias direction. Alternating current cyclings with peak voltages of +/−6 V rejuvenated the degraded ferroelectric performance of the capacitors. Cycling with a negative bias was more effective in fixing the damage than was a positive bias. Baking at 125 °C again degraded the rejuvenated ferroelectric performance. The degree of re-degradation was also dependent on the polarity of the rejuvenating bias. The polarity-dependent behavior of rejuvenation was explained on the basis of a negative-internal-field model due...

Nanoscale imaging of grain orientations and ferroelectric domains in (Bi1−xLax)4Ti3O12 films for ferroelectric memories

We report results of nanoscopic investigation of grain crystallographic orientations and ferroelectric domains by electron backscatter diffraction (EBSD) technique and piezoresponse force microscope (PFM), respectively, in (Bi1−xLax)4Ti3O12 (BLT) films for ferroelectric semiconductor memories. It is demonstrated that the EBSD technique is useful in characterizing nanoscale grain crystallographic orientations of BLT films. Comparison studies of grain orientations by EBSD technique and switching properties of ferroelectric domains by PFM show that c-axis parallel to normal oriented grains with almost linear dielectric properties have platelike morphology. However, a- or b-axis oriented grains with superior ferroelectric properties have ellipsoidal morphology with a size of less than 0.2μm in long axis. Consequently, the suppression of the platelike structures through process controls is important for the realization of high-density BLT-based memories.

Stress effects of the inter-level dielectric layer on the ferroelectric performance of integrated SrBi2Ta2O9 capacitors

The thermal stress effects of the inter-level dielectric (ILD) layer on the ferroelectric performance of integrated Pt/SrBi2Ta2O9(SBT)/Pt capacitors were investigated. Two different thin film materials, pure SiO2 grown at 650 °C and B- and P-doped SiO2 grown at 400 °C by chemical vapor deposition techniques, were tested as an ILD layer. The ILD layer encapsulated the SBT capacitor array. During high temperature thermal cycling (up to 800 °C) after ILD deposition, which is used for both densifying the ILD and curing of the various damage imposed on the SBT capacitors, a large thermal stress occurred in the bottom Pt layer due to the thermal expansion mismatch between the various layers. In particular, the pure SiO2 ILD layer between the capacitors did not allow thermal expansion of the Pt layers, which led to a large accumulation of compressive stress in the layer. This resulted in hillock formation in the bottom Pt layer and eventual capacitor failure. However, the B- and P-doped SiO2 ILD layer contracted...

Hydrogen barriers for SrBi2Ta2O9-based ferroelectric memories

We report on a hydrogen barrier necessary for a conventional passivation process of integrated SrBi2Ta2O9 (SBT)-based memories. The passivation process significantly degraded electrical properties of the memories, resulting from hydrogen damage in the SBT capacitors. Metallic films (Ti, TiN, and Al) were investigated as a hydrogen barrier during the passivation process. The Ti(>500 A) hydrogen barrier only showed the electrical properties of memories free from hydrogen damage. The formation of stable hydrides and the suppressed diffusion of hydrogen through the Ti films during the passivation processes resulted in sufficient switching polarization, low leakage current, and good reliabilities at high temperature.

Performance and Reliability of Low-Temperature Processed SrBi2Ta2 O 9 Capacitors for FeRAM Applications

Low-temperature processed SrBi 2 Ta 2 O 9 (SBT) capacitors were tested as the ferroelectric memory cells of fully functional ferroelectric random access memory (FeRAM) devices. The 100 nm thick SBT films were deposited by the spin-on coating technique using a metallorganic decomposition source and crystallized by rapid thermal annealing at 700°C for 1 min followed by a furnace annealing at 650°C for I h under oxygen atmosphere, considered a low thermal budget process. The fabricated Pt/SBT/Pt capacitors showed reasonable ferroelectric performances with a AP (switching polarization-nonswitching polarization) of approximately 10 μC/cm 2 after the full process integration. The FeRAM chip-level reliability analysis showed that the major reason for the function failure was from the opposite state retention characteristics due mainly to the small AP values. A 10-year guaranteed lifetime can be achieved when the operation voltage is higher than approximately 4 V at the test condition of 85°C operation and 125°C storage.

Noble FeRAM technologies with MTP cell structure and BLT ferroelectric capacitors

A 16 Mb 1TIC FeRAM with a novel cell structure has been successfully developed with 0.25 /spl mu/m process technology using (Bi,La)/sub 4/Ti/sub 3/O/sub 12/ (BLT) capacitors for the first time. The developed FeRAM is highly scalable and reliable as a result of applying an MTP (merged top electrode and plate line) structure and BLT stacked capacitor, respectively.