Susan K. Lichtensteiger

Using selective voltage binning to maximize yield

Yield loss associated with leakage screens is increasing as products migrate to technologies with thinner gate oxide and more aggressive lithography. Product competitiveness requires meeting low power and when products have exhausted design options, tighter than 3 sigma fast leakage screens are implemented to reduce power which can result in significant yield loss. Selective Voltage Binning (SVB) provides a way to interlock a lower operating voltage in the system with process window information so that faster parts can be run in the system at a lower voltage avoiding the yield loss associated with custom leakage screens.

Modeling leakage in ASIC libraries

Leakage is one of todays most important VLSI design issues, and ASIC design tools require accurate library leakage models. Leakage models have been traditionally derived from Spice simulation, but this approach is difficult and inflexible. Further, Spice simulation may not be possible for all IP in the library. We propose a new approach to modeling leakage of ASIC libraries. This approach is simple and flexible, and it is viable for all IP in the library. It requires no Spice simulation, yet its accuracy has been verified in silicon. It has been implemented for our 90nm ASICs

Using Selective Voltage Binning to Maximize Yield

Yield loss associated with leakage screens is increasing as products migrate to technologies with thinner gate oxide and more aggressive lithography. Product competitiveness requires meeting low power and when products have exhausted design options, tighter than 3 sigma fast leakage screens are implemented to reduce power which can result in significant yield loss.

Accurate chip leakage prediction: Challenges and solutions

A systematic method is proposed to address modeling challenges in accurate chip level leakage prediction, namely a precise total leakage width count method, a simple model to quantify leakage uplift caused by systematic across-chip variation, and a consistent model to capture 3-sigma leakage and leakage spread at fixed performance.