Teresa Pinto

Phase transitions in Ge-Sb phase change materials

Thin films of the phase change material Ge–Sb with Ge concentrations between 7.3 and 81.1 at. % were deposited by cosputtering from elemental targets. Their crystallization behavior was studied using time-resolved x-ray diffraction, Auger electron spectroscopy, differential scanning calorimetry, x-ray reflectivity, profilometry, optical reflectivity, and resistivity versus temperature measurements. It was found that the crystallization temperature increases with Ge content. Calculations of the glass transition temperature (which is a lower limit for the crystallization temperature Tx) also show an increase with Ge concentration closely tracking the measured values of Tx. For low Ge content samples, Sb x-ray diffraction peaks occurred during a heating ramp at lower temperature than Ge diffraction peaks. The appearance of Ge peaks is related to Ge precipitation and agglomeration. For Ge concentrations of 59.3 at. % and higher, Sb and Ge peaks occurred at the same temperature. Upon crystallization, film mass...

Direct evidence for abrupt postcrystallization germanium precipitation in thin phase-change films of Sb–15at.% Ge

We present evidence for the instability in the crystalline (metallic) state of binary Te-free phase-change Ge–Sb thin films considered for integration into nonvolatile nanosized memory cells. We find that while the amorphous (semiconducting) phase of eutectic Sb–15at.% Ge is very robust until Sb crystallization at 240°C, at about 350°C, germanium rapidly precipitates out. Ge precipitation, visualized directly with transmission electron microscopy, is exothermic and is found to affect the films’ reflectivity, resistance, and stress. It converts melting into a two-step process, which may seriously impact the switching reliability of a device.

Strained Si Channel MOSFETs with Embedded Silicon Carbon Formed by Solid Phase Epitaxy

Current drive enhancement is demonstrated in sub-40 nm NFETs with strained silicon carbon (Si:C) source and drain using a novel solid-phase epitaxy (SPE) technique for the first time. The very simple process uses no recess etch or epi deposition steps, adds minimal process cost, and can be easily integrated into a standard CMOS process. With a record high 1.65 at% substitutional C concentration in source and drain, 615 MPa uniaxial tensile stress was introduced in the channel, leading to a 35% improvement in electron mobility and 6% and 15% current drive increase in sub-40 and 200 nm channel length devices respectively.

Observation of semiconductor device channel strain using in-line high resolution X-ray diffraction

In-line high resolution X-ray diffraction has been used to analyze embedded silicon-germanium (eSiGe) epitaxially grown in the source/drain regions of complementary metal-oxide-semiconductor devices. Compared to blanket films, the diffraction from patterned devices exhibited distinct features corresponding to the eSiGe in the source/drain regions and Si under the gate and SiGe. The diffraction features modulated with structural changes, alloy composition, and subsequent thermal processing. Reciprocal space measurements taken around the (224) diffraction peak revealed both in-plane (h) and out-of-plane (l) lattice deformation, along with features corresponding to the regular spacing between the gates.

On implementation of embedded phosphorus-doped SiC stressors in SOI nMOSFETs

We report a successful implementation of epitaxially grown Phosphorus-doped (P-doped) embedded SiC stressors into SOI nMOSFETs. We identify a process integration scheme that best preserves the SiC strain and minimizes parasitic resistance. At a substitutional C concentration (Csub) of ~1.0%, high performance nFETs with SiC stressors demonstrate ~9% enhanced Ieff and ~15% improved Idlin against the well calibrated control devices. It is found that the tensile liner technique provides further performance improvement for nFETs with SiC stressors, whereas the stress memory technique (SMT) does not provide performance gain in a laser annealing process that is used to preserve SiC strain. The material quality of the SiC stressors strongly affects strain transfer.

Low-Temperature Oxide Wafer Bonding for 3-D Integration: Chemistry of Bulk Oxide Matters

The effect of bulk chemistry of deposited oxide materials on the eventual wafer bonding energy was fundamentally studied. Although low-temperature silicon oxide (LTO) and tetraethyl orthosilicate (TEOS) exhibited the same bulk density, and nitrogen plasma generated a higher degree of surface activation for TEOS than LTO, using LTO as the bonding oxide resulted in a much higher bonding energy than TEOS. This was attributed to the relatively high percentage of hydrogen-bonded silanol groups in LTO, which pointed to the existence of fine defect areas in LTO that would better accommodate the water molecules generated later by the interfacial condensation reactions. A pre-bonding baking step was found favorable for LTO wafer bonding.

Effect of Ion Implantation and Anneals on Fully-strained SiC and SiC:P Films using Multiple Characterization Techniques

In addition to device scaling, strain engineering using SiC stressors in the S/D regions is important for nFET performance enhancement [1-3]. In this paper, we review the characterization of fully-strained epitaxial SiC and in-situ doped SiC:P films for various ion implant conditions and anneals that are typically used in traditional CMOS flows. μXRD strain measurements and SIMS (C and P content) were performed on reference test macros on patterned lithographic wafers. μXRD strain measurements (related to substitutional C) of the asdeposited SiC films show that the C is lower than the actual C suggesting that there is interstitial C in the film. After M1 device measurements, Nanobeam Diffraction (NBD) analysis to determine channel strain was done on selected samples. An in-line μXRD system was used to monitor the strain and thickness variation of the SiC stressor with critical processing steps. Typical uXRD measurements demonstrate that there is a depth profile for the crystalline integrity of the SiC stressor films. The top surface which is in the implant range shows no strain (amorphization due to implants) compared to the fully strained, deeper regions (Fig 1). Figure 2 shows a typical cross-sectional TEM image and NBD patterns with the as-deposited SiC embedded in the source and drain. After M1 device measurements, good correlation was seen between the NBD and uXRD measurements (Fig 3). Stressor strain for samples 1-4 was retained after complete processing. Sample 5 which saw a high temperature anneal showed a complete loss of strain. This correlated well with the device results [4]. Full characterization has helped identify process integration schemes which give significant drive current enhancements [4].