Thomas A. Wassick

The application of laser process technology to thin film packaging

Laser process technologies have been developed which are well suited to the manufacture of thin film electronic packages. The authors discuss three technologies-laser ablation, laser-assisted metal etching, and laser chemical vapor deposition-and how they can be used in polymer and metal patterning. Process and tooling considerations as well as specific applications are presented.<<ETX>>

Comparative electromigration performance of Pb Free flip chip joints with varying board surface condition

For the past several years, the semiconductor industry has been responding to the RoHS directive to eliminate certain hazardous substances from electronic components. One of the areas where work is still ongoing to comply is in the area of flip chip interconnects. Currently, leaded flip chip interconnects are allowed under an exemption in the RoHS directive due to a perceived lack of a technically viable solution. Recently, a number of Pb-Free flip chip interconnects have been introduced to the industry and have been in high volume production for a few years.

Comparison of electromigration behaviors of SnAg and SnCu solders

Two commonly used Pb-free solders, SnAg and SnCu, are studied for electromigration (EM) reliability. Two major EM failure mechanisms are identified in Sn-based Pb-free solders, which is mainly due to the differences in microstructures and Sn-grain orientation. In general, the EM damage in SnCu solder is driven by the fast interstitial diffusion of Ni and Cu away from solder/UBM interface and leads to early fails; while the damage in SnAg solders is mostly dominated by Sn-self diffusion resulting in longer lifetime. The effective activation energy is 0.95 eV for SnAg solder and 0.54 eV for SnCu solder. The current density power law exponent is 2 for SnAg and 1.2 for SnCu, respectively. Blech effect is observed in the solders with Sn-self diffusion dominated failures. The roles of Ag and Cu on EM performance will be discussed.

A high density, high performance MCM-D/C package: a design, electrical, and process perspective

This paper describes a state-of-the-art seven chip MCM-D/C package currently under production for use as a processor module for the high end of IBMs AS/400 Advanced Series with PowerPC technology. Physical design, process, and electrical design (characterization) is described, and trade-offs made between them are discussed.

Differential heating/cooling chip joining method to prevent chip package interaction issue in large die with ultra low-k technology

A differential heating/cooling chip join method was developed for Pb-free flip chip packaging of ultra low-k (ULK) technology Si chips on organic substrates to prevent Chip-Package Interaction (CPI) - related damage upon chip joining. A chip was mounted to a bonder head and a substrate was located on a base plate and they were held at different elevated temperatures during the bonding process. The temperature difference between the Si chip and the organic substrate during assembly provides a substantially matched thermal expansion and minimizes stress induced by coefficient of thermal expansion (CTE) mismatch. From the modeling study, it was confirmed that chip warpage, Controlled Collapse Chip Connection (C4) stresses/strains, and ULK stresses decreased significantly by differential heating/cooling chip join method, with further improvement noted as the substrate temperature was decreased during the bonding process. X-ray, scanning electron microscope (SEM) and C-mode scanning acoustic microscope (C-SAM) were used to examine the defects after flip chip assembly. Noncontact white light reflectometry was also used to measure the warpage shape of the assembled silicon chip and the organic substrate. Observation under C-SAM indicated that fractures in the ULK layers were dramatically reduced by the differential heating/cooling chip joining process compared to the conventional reflow process. Non-destructive X-ray images indicated there were no solder bridging in any area of the chip interconnects. The experimental results showed that the differential heating/cooling chip join process can effectively reduce fractures in the ULK layers and prevent C4 bump bridging in a large die package with low-K dielectric constant device integration and high Ag content solder bumps.

Open repair technologies for MCM-D

IBM has developed various technologies for repairing defects in thin film circuitry, primarily for Multichip Module (MCM) applications. This paper discusses five technologies: laser chemical vapor deposition (LCVD), wire bond, laser-sonic bonding, solder repair, and self-induced repair, with focus on the process parameters and tooling aspects of the three established in IBMs production environment. >

Solder Bump Electromigration and CPI Challenges in Low-k Devices

Understanding and managing both chip-to-package interaction (CPI) and solder bump electromigration (EM) is becoming an increasing challenge for flip chip plastic ball grid array (FCPBGA) packaging. Requirements for state-of-the-art device technologies include shrinking of feature dimensions with respect to the prior technology node, faster speed, higher power, increased die size and RoHS compliance. To meet these requirements, device designs typically employ promising new low-k dielectric materials, unique construction elements, copper interconnections and Pb-free solder bumps.

Excimer laser ablation of polyimide: a 14-year IBM perspective

IBM introduced the first commercial high-end mainframe computer system incorporating laser ablation technology in 1991. This milestone was the culmination of nearly a decade of scientific, engineering, and manufacturing effort. Extensive research and development on 308 nm laser ablation of polyimide lead to the first IBM prototype ablation tool in 1987 for the production of via-holes in thin film packaging structures. This prototype, similar to step and repeat photolithography systems, evolved into full-scale manufacturing tools which utilize sophisticated beam shaping, beam homogenizing, and projection optics. But the maturity of this technology belies the fact that the scientific understanding of the laser ablation process is still far from complete. This paper briefly reviews the engineering and scientific accomplishments, both within and external to IBM, that lead to the commercial utilization of the laser ablation process. Current technical tissues are discussed, in addition to alternative IBM applications of polyimide ablation. The paper concludes by discussing the relative merits of excimer vs. solid-state lasers, and how each may impact future manufacturing technology.

Laser processes for multichip module's high-density multilevel thin film packaging

Today multichip modules (MCMs) have found applications in a variety of fields including computers, telecommunication, automotive industry, and medical diagnosis devices. Lasers are being used as a processing tool for fabricating high density multilevel thin film packages for MCMs. The two most commonly practiced laser processes for multilevel thin film packaging are, laser via ablation and laser based circuit repair processes. Laser via ablation is used for creating via holes in polyimide to provide vertical connection between two adjacent layers of multilevel thin film. It is a dry, precise, and highly robust patterning technology available today in packaging industry. The three major aspects of via ablation technology are ablation process, mask technology, and tooling. IBM has pioneered the laser via ablation technology and has developed all three aspects to use it as a primary technology for via formation for thin film packages. Laser based circuit repair processes have also been developed to a mature state where they are being used on a routine basis to repair circuits in multilevel thin film packages. The need for repair of circuit arises for variety of reasons including, contamination, yield improvement, to accommodate engineering changes or to correct design errors. The commonly practiced laser based repair processes are deleting metal shorts using a laser, depositing metal using laser chemical vapor deposition technique, and stitching metal lines using laser sonic bonding technique.

Development of a 50mm dual Flip Chip Plastic Land Grid Array package for server applications

For many years, the Flip Chip Plastic Ball Grid Array (FC-PBGA) has been the preferred packaging solution for microprocessors and high performance ASICs. IBM has developed a dual chip Flip Chip Plastic Land Grid Array (FC- PLGA) package to support low and mid range server solutions. This organic 50 mm times 50 mm lead reduced package solution uses a 6-4-6 build-up laminate with two large chips consisting of a processor (22 times 16 mm) and a memory cache (15 times 13 mm) in a single piece lid capping solution. In this paper, we will summarize development activities performed in order to achieve a reliable product while dissipating up to 200 Watts mostly from the microprocessor chip. One of the many key issues to overcome was the assurance of good package thermal stability with such large silicon area coverage over the flexible organic chip carrier. Special chip and module test vehicles were designed and fabricated in order to evaluate the mechanical, electrical, and thermal behaviour of the package post assembly and throughout stress testing. The assembly process development activities performed to support the desired application will be discussed in conjunction with mechanical modeling results. In addition, thermal data will be presented showing the positive results obtained as well as good correlation to the thermal and mechanical models.