Thomas J. Cunningham

An enhanced-performance CMOS imager with a flushed-reset photodiode pixel

A new front-end for photodiode-based CMOS imagers is presented. Degradation in imaging performance due to conventional hard- and soft-reset of pixels is analyzed. To overcome these limitations, the design and operation of a flushed-reset pixel is described. The flushed-reset pixel combines the best of hard- and soft-reset to simultaneously provide excellent radiometric accuracy, high linearity, no image lag, high saturation level, and reduced read-noise. The new front-end is implemented by changes to the column-circuitry only, leaving the pixel unchanged, preventing degradation of any unrelated imaging performance. It is compatible with large format imager implementation, has minimal impact on the frame-rate, and does not introduce any additional hot-carrier stress in the pixel. Data from a large format (512/sup 2/) imager demonstrates the efficacy of the flushed-reset pixel approach.

Reset noise suppression in two-dimensional CMOS photodiode pixels through column-based feedback-reset

We present a new CMOS photodiode imager pixel with ultralow read noise through on-chip suppression of reset noise via column-based feedback circuitry. In a 0.5 /spl mu/m CMOS process, the pixel occupies only 10/spl times/10 /spl mu/m/sup 2/ area. Data from a 256/sup 2/ CMOS imager indicates imager operation with read noise as low as 6 electrons without employing on- or off-chip correlated double sampling. The noise reduction is achieved without introducing any image lag, and with insignificant reduction in quantum efficiency and full-well.

A single-chip programmable digital CMOS imager with enhanced low-light detection capability

The advent of high performance imaging in CMOS technology using active pixel sensors has enabled ultra-low power, miniature, single-chip, digital camera systems. We report at fully digital, programmable, 5-wire, large format (512/spl times/512) camera-on-a-chip that integrates the imager array, control logic, ADC, and bias generation on the same chip. The chip runs off a single (3.3 V) power supply, consumes only 10 mW, is capable of electronic panning, and produces high quality images with a low noise of <40 e/sup -/, and excellent response linearity down to read noise levels.

Direct detection of 0.1–20keV electrons with delta doped, fully depleted, high purity silicon p-i-n diode arrays

Direct detection of 0.1–20keV electrons is demonstrated using a boron delta doped high purity Si p-i-n diode array. Molecular beam epitaxy is used to grow a delta layer on the back surface of these fully depletable p-i-n diode arrays to form an electrode for detecting shallow-penetrating ionizing radiation. Device structure, processing, and characterization methods used for device testing and measurement of its response to electrons are discussed. Use of this detector for measuring the Si quantum yield over this wide energy range is also discussed.

Active pixel sensors for mass spectrometry

Abstract Active pixel sensors (APS) are micro-fabricated CMOS amplifier arrays that are rapidly replacing CCD devices in many electronic imaging applications. Unlike the pixels of a CCD device, the sensing elements of the APS will respond to locally situated electrostatic charge, owing to the amplifier present in each pixel. We have built two small test arrays with microscopic aluminum electrodes integrated onto standard APS readout circuitry for the purpose of detecting low-energy gas-phase ions in mass spectrometers and other analytical instruments. The devices exhibit a near-linear dynamic range greater than four orders of magnitude, and a noise level of less than 100 electrons at room temperature. Data are presented for the response of the APS detectors to small ions in a miniature magnetic sector mass spectrometer and in an atmospheric pressure jet of helium. Data for individual highly-charged electrospray droplets are presented as well. Anticipated improvements suggest that in the near future APS ion detectors will posses noise levels approaching 10 electrons and will have a useful dynamic range over six orders of magnitude.

Direct Detection of 100–5000 eV Electrons With Delta-Doped Silicon CMOS and Electron-Multiplying CCD Imagers

We have demonstrated a direct detection of 100-5000 eV electrons with a back-illuminated boron delta-doped hybrid silicon complementary metal-oxide-semiconductor imager operating in full depletion and a silicon electron-multiplying charge-coupled device (CCD) operating in partial depletion. The delta-doping molecular beam epitaxy increases sensitivity to low-energy electrons and improves low-energy electron detection threshold relative to conventional solid-state detectors. We compare the gain measured in these two delta-doped devices with gain measured from control delta-doped CCDs.

Single-event keV proton detection using a delta-doped charge-coupled device

Using a delta-doped charge-coupled device (CCD), we have demonstrated an order-of-magnitude improvement in the low-energy cutoff for particle detection compared to conventional solid-state detectors. Individual protons with energies in the 1.2–12 keV range were successfully detected using a delta-doped, back-illuminated CCD. Moreover, it is shown that, by measuring the charge generated by the proton, it is potentially possible to use delta-doped CCDs to determine the energy of the incoming particle.

Deep cryogenic noise and electrical characterization of the complementary heterojunction field-effect transistor (CHFET)

This paper discusses a characterization at 4 K of the complementary heterojunction field-effect transistor (CHFET), to examine its suitability for deep cryogenic ( >

An analysis of the temperature dependence of the gate current in complementary heterojunction field-effect transistors

The temperature dependence of the gate current versus the gate voltage in complementary heterojunction field-effect transistors (CHFETs) is examined. An analysis indicates that the gate conduction is due to a combination of thermionic emission, thermionic-field emission, and conduction through a temperature-activated resistance. The thermionic-field emission is consistent with tunneling through the AlGaAs insulator. The activation energy of the resistance is consistent with the ionization energy associated with the DX center in the AlGaAs. Methods to reduce the gate current are discussed.<<ETX>>

CMOS digital imager design from a system-on-a-chip perspective

Due to substantial mixed analog-digital circuit integration in one chip, CMOS digital imager cannot be considered only as a photoelectric transducer. In this paper, we have identified timing and circuit layout considerations that are critical for implementing a digital CMOS camera-on-a-chip. An optimized binary-scaled tree-topology power routing has been shown to be critical for minimizing chip area and providing low spatial pattern noise. Imaging artifacts due to timing asymmetry have been quantified, and methods for elimination of the artifacts have been demonstrated. The impact of on-chip bias-generation and drive circuits on the on-chip ADC performance has been shown. New timing and circuit layout techniques have been presented for enabling random noise limited performance of a CMOS imager.