Tom Wallow

Insertion strategy for EUV lithography

The first use of extreme ultraviolet (EUV) lithography in logic manufacturing is targeted for the 14 nm node, with possible earlier application to 20-nm node logic device back-end layers to demonstrate the technology. Use of EUV lithography to pattern the via-levels will allow the use of dark-field EUV masks with low pattern densities and will postpone the day when completely defect-free EUV mask blanks are needed. The quality of the imaging at the 14 nm node with EUV lithography is considerably higher than with double-dipole or double-exposure double-etch 193-nm immersion lithography, particularly for 2-dimensional patterns such as vias, because the Rayleigh k1-value when printing with 0.25 numerical aperture (NA) EUV lithography is so much higher than with 1.35 NA 193-nm immersion lithography and the process windows with EUV lithography are huge. In this paper, the status of EUV lithography technology as seen from an end-user perspective is summarized and the current values of the most important metrics for each of the critical elements of the technology are compared to the values needed for the insertion of EUVL into production at the 14 nm technology node.

The SEMATECH Berkeley MET pushing EUV development beyond 22-nm half pitch

Microfield exposure tools (METs) play a crucial role in the development of extreme ultraviolet (EUV) resists and masks. One of these tools is the SEMATECH Berkeley 0.3 numerical aperture (NA) MET. Using conventional illumination this tool is limited to approximately 22-nm half pitch resolution. However, resolution enhancement techniques have been used to push the patterning capabilities of this tool to half pitches of 18 nm and below. This resolution was achieved in a new imageable hardmask which also supports contact printing down to 22 nm with conventional illumination. Along with resolution, line-edge roughness is another crucial hurdle facing EUV resists. Much of the resist LER, however, can be attributed to the mask. We have shown that intenssionally aggressive mask cleaning on an older generation mask causes correlated LER in photoresist to increase from 3.4 nm to 4.0 nm. We have also shown that new generation EUV masks (100 pm of substrate roughness) can achieve correlated LER values of 1.1 nm, a 3× improvement over the correlated LER of older generation EUV masks (230 pm of substrate roughness). Finally, a 0.5-NA MET has been proposed that will address the needs of EUV development at the 16-nm node and beyond. The tool will support an ultimate resolution of 8 nm half-pitch and generalized printing using conventional illumination down to 12 nm half pitch.

Resist pattern prediction at EUV

Accurate and flexible simulation methods may be used to further a researchers understanding of how complex resist effects influence the patterning of critical structures. In this work, we attempt to gain insight into the behavior of a state-of-the-art EUV resist through the use of stochastic resist simulation. The statistics of photon and molecule counting are discussed. A discrete, probabilistic ionization and electron scattering simulator for acid generation at EUV is discussed. At EUV, acid generators are hypothesized to be activated by secondary electrons yielded by ionization of the resist upon absorption of photons. Model fit to experimental data of mean CD and LWR for a state-of-the-art EUV resist is shown.

EUV lithography at the 22nm technology node

We are evaluating the readiness of extreme ultraviolet (EUV) lithography for insertion into production at the 15 nm technology node by integrating it into standard semiconductor process flows because we believe that device integration exercises provide the truest test of technology readiness and, at the same time, highlight the remaining critical issues. In this paper, we describe the use of EUV lithography with the 0.25 NA Alpha Demo Tool (ADT) to pattern the contact and first interconnect levels of a large (~24 mm x 32 mm) 22 nm node test chip using EUV masks with state-of-the-art defectivity (~0.3 defects/cm2). We have found that: 1) the quality of EUVL printing at the 22 nm node is considerably higher than the printing produced with 193 nm immersion lithography; 2) printing at the 22 nm node with EUV lithography results in higher yield than double exposure double-etch 193i lithography; and 3) EUV lithography with the 0.25 NA ADT is capable of supporting some early device development work at the 15 nm technology node.

EUV resist performance: current assessment for sub-22-nm half-pitch patterning on NXE:3300

The major challenge for EUV resists at 22 nm half-pitch and below continues to be simultaneously achieving resolution, sensitivity, and line-width roughness (LWR) targets. An ongoing micro-exposure tool (MET) based evaluation of leading resists throughout 2011 shows that incremental progress toward meeting requirements continues apace, with best-of-breed candidates now capable of limiting 19 nm half-pitch resolution at sensitivities near or below 20 mJ/cm2 and LWR below 4 nm 3σ through process window. Evaluation of a selection of leading resists using an ASML NXE:3100 2nd generation full-field exposure tool demonstrates key performance improvements vs. the previous process-of- record (POR) setup resist including enhanced process window at 22 nm half-pitch and better contact hole uniformity. Champion limiting resolution performance for chemically amplified resists at a relaxed sensitivity specification has advanced to 16 nm half-pitch for both MET and full-field exposures.

Are extreme ultraviolet resists ready for the 32nm node

The International Technology Roadmap for Semiconductors (ITRS) insertion point of extreme ultraviolet (EUV) lithography is the 32nm half-pitch node, and significant worldwide effort is being focused toward this goal. Potential road blocks have been identified and are being addressed. Readiness of EUV photoresists is one of the risk areas. According to the ITRS (www.itrs.net), a production-worthy EUV resist at 32nm half-pitch has to have a photospeed of ∼5mJ∕cm2 and line edge roughness (3σ) of 1.4nm. Toward this goal, the joint INVENT activity (AMD, CNSE, IBM, Micron, and Qimonda) at Albany has evaluated a broad range of EUV photoresists on various EUV exposure tools worldwide, including EUV MET at Lawrence Berkeley National Laboratory, EUV MET at SEMATECH Albany, and EUV interferometer at the Paul Scherrer Institute, Switzerland. This article will give a survey of the results, assessing the strengths and weaknesses of current materials.

EUV masks under exposure: practical considerations

This paper focuses on the practical side of EUV mask metrology and use. Mask metrics such as film thickness, material properties, feature profile, critical feature size, line edge/width roughness (LER/LWR) and defect levels are measured and monitored on the mask. Any variability in mask properties will be transferred to wafer print results. EUV masks have no pellicle and will be cleaned between exposures to extend use. This additional processing creates new opportunity for modifications to the mask after qualification. This paper quantifies mask variability and the induced change to printed wafer critical dimension (CD). The results are compared to the 56nm wafer pitch targets for CD and LER. This EUV-specific effort is required to determine how close EUV masks are to meeting manufacturing requirements and whether there are areas of development that require additional focus from the industry.

Deconstructing contact hole CD printing variability in EUV lithography

Lithographic CD printing variability can be easily captured with a CDU measurement, however delineating the most significant sources causing the variability is challenging. In EUV lithography, the resist, reticle, metrology methodology, and stochastics are examples of factors that influence printing variability. Determining the most significant sources of variability in contact hole and via patterning is particularly interesting because the variability can be measured as a function of two tethered dimensions. Contact hole (CH) variability has a direct impact on device performance while via variability affects metal area scaling and design. By studying sources of variability opportunities for improving device performance and scaling can be identified. In this paper, we will examine sources of contact patterning variability in EUV lithography comprehensively using various EUV exposure tools as well as simulation methods. We will present a benchmark of current state of the art materials and patterning methods with the goal of assessing contact hole printability at the limit of 0.33 NA EUV lithography.

Using synchrotron light to accelerate EUV resist and mask materials learning

As commercialization of extreme ultraviolet lithography (EUVL) progresses, direct industry activities are being focused on near term concerns. The question of long term extendibility of EUVL, however, remains crucial given the magnitude of the investments yet required to make EUVL a reality. Extendibility questions are best addressed using advanced research tools such as the SEMATECH Berkeley microfield exposure tool (MET) and actinic inspection tool (AIT). Utilizing Lawrence Berkeley National Laboratorys Advanced Light Source facility as the light source, these tools benefit from the unique properties of synchrotron light enabling research at nodes generations ahead of what is possible with commercial tools. The MET for example uses extremely bright undulator radiation to enable a lossless fully programmable coherence illuminator. Using such a system, resolution enhancing illuminations achieving k1 factors of 0.25 can readily be attained. Given the MET numerical aperture of 0.3, this translates to an ultimate resolution capability of 12 nm. Using such methods, the SEMATECH Berkeley MET has demonstrated resolution in resist to 16-nm half pitch and below in an imageable spin-on hard mask. At a half pitch of 16 nm, this material achieves a line-edge roughness of 2 nm with a correlation length of 6 nm. These new results demonstrate that the observed stall in ultimate resolution progress in chemically amplified resists is a materials issue rather than a tool limitation. With a resolution limit of 20-22 nm, the CAR champion from 2008 remains as the highest performing CAR tested to date. To enable continued advanced learning in EUV resists, SEMATECH has initiated a plan to implement a 0.5 NA microfield tool at the Advanced Light Source synchrotron facility. This tool will be capable of printing down to 8-nm half pitch.

EUV OPC for 56nm metal pitch

For the logic generations of the 15 nm node and beyond, the printing of pitches at 64nm and below are needed. For EUV lithography to replace ArF-based multi-exposure techniques, it is required to print these patterns in a single exposure process. The k1 factor is roughly 0.6 for 64nm pitch at an NA of 0.25, and k1 ≈ 0.52 for 56nm pitch. These k1 numbers are of the same order at which model based OPC was introduced in KrF and ArF lithography a decade or so earlier. While we have done earlier work that used model-based OPC for the 22nm node test devices using EUV,1 we used a simple threshold model without further resist model calibration. For 64 nm pitch at an NA of 0.25, the OPC becomes more important, and at 56nm pitch it becomes critical. For 15 nm node lithography, we resort to a full resist model calibration using tools that were adapted from conventional optical lithography. We use a straight shrink 22 nm test layout to assess post-OPC printability of a metal layer at pitches at 64 nm and 56 nm, and we use this information to correct test layouts.