Vivian W. Ryan

CVD Co and its application to Cu damascene interconnections

Fundamental material interactions as pertinent to nano-scale copper interconnects were studied for CVD Co with a variety of micro-analytical techniques. Native Co oxide grew rapidly within a few hours (XPS). Incorporation of oxygen and carbon in the CVD Co films (by AES and SIMS) depended on underlying materials, such as Ta, TaN, or Ru. Copper film texture (by XRD) and agglomeration resistance (by AFM) showed correlations with amounts of in-film oxygen/carbon. Cobalt diffused through copper at normal processing temperatures (by SIMS). CVD Co demonstrated diffusion barrier performance to Cu (by Triangular Voltage Sweep, TVS), but not to O2. CVD Co was applied to 32 nm/22 nm damascene Cu interconnect fabrication in a scheme defined by the material studies. Lower post-CMP defect density and longer electromigration lifetimes were obtained.

CPI challenges to BEOL at 28nm node and beyond

We address package-induced degradation of BEOL interconnects and approaches for recovery. For dielectrics, we cover process options and position in stack for ULK films and how these lead to differences in strength. Experiments were designed to cross-compare multiple methods to test susceptibility of BEOL interconnect to CPI damage. We also address how Chip Package Interaction changes as BEOL features and layout evolve.

BEOL challenges for 14nm node and beyond

Scaling the BEOL into 14nm includes challenges in both the material selection and the integration. Metallization-induced degradation of the ULK is an issue regardless of dielectric choice, or the PVD vs. ALD selection, and options for possible recovery of characteristics are numerous. In barrier/liner/seed decisions, the integration choices play into material selection, and the deposition techniques impact upon microstructure, and hence reliability, is significant. For plating, conventional processes may not allow the high fill speeds necessary, and aspect ratio constraints are driving processes to new areas. Finally, we will also address how CPI is changing as interconnect evolves.

Robust low-k film with sub-nm pores and high carbon content for highly reliable Cu/low-k BEOL modules

Critical parameters of low-k films were defined to keep capacitance benefit and TDDB reliability in the scaling BEOL module, according to various analyses. In order to meet the criteria of high carbon content, low porosity with small pores, and high adhesion strength with less adhesion layer, precursor and process were designed for the SiOCH with k~2.5. The benefits in integration and reliability from the newly developed robust low-k film were verified through the trench-first integration of 80 nm-pitch BEOL modules.

Microprobing the mechanical effects of varying dielectric porosity in advanced interconnect structures

Chip-package interaction has become a major concern due to increasingly porous low-K dielectrics. During the packaging process, shear stresses are exerted on fragile interconnect structures. We use a microprobe metrology system to experimentally measure how interconnect stacks with different dielectric porosities behave under various shear loading conditions and a wide range of temperatures.