Yelehanka Ramachandramurthy Pradeep

Wafer level microarcing model in 90nm chemical-vapor deposition low-k via etch on 300mm silicon-on-insulator substrate

In SiOCH (C-doped SiO2) via etch application, high polymer deposition chemistry is needed for better selectivity to both photoresist and underlying barrier materials. To prevent etch stop, high ion energy plasma is required to achieve a good process window. C4F6∕CH3F, etc., was used as via main etch chemistry for better selectivity and striation performance. However, wafer level microarcing (WLMA) was observed at the wafer edge around the guard ring. This WLMA phenomenon is different from that of the magnetically enhanced reactive ion etching or capacitively coupled plasma low-gap reactor. By process optimization, we managed to develop a process that is production-ramp worthy. We have also compared the rf parameters during via etch process on both silicon-on-insulator and bulk Si substrates, which shows no significant difference. The electrical and defect scan results suggest that it is free from WLMA.