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Featured researches published by Yi-He Tsai.


IEEE Electron Device Letters | 2016

High-Performance Schottky Contact Quantum-Well Germanium Channel pMOSFET With Low Thermal Budget Process

Chung-Chun Hsu; Yi-He Tsai; Che-Wei Chen; Jyun-Han Li; Yu-Hsien Lin; Yao-Jen Lee; Guang-Li Luo; Chao-Hsin Chien

We present a high-performance Si/Ge/Si p-channel metal-oxide-semiconductor field-effect transistor (pMOSFET) with a NiSiGe Schottky junction source/drain (S/D) formed through microwave-activated annealing. A Schottky contact S/D is preferable, because the lower process temperature is beneficial for eliminating Ge diffusion. The fabricated NiSiGe Schottky junction exhibited a high effective barrier height (ΦBn) of 0.69 eV for electrons, resulting in a high junction current ratio of more than 105 at the applied voltage of |Va| = 1 V. Our quantum-well pMOSFET exhibited a high ION/IOFF ratio of ~107 (IS) and a moderate subthreshold swing of 166 mV/decade.


IEEE Transactions on Electron Devices | 2016

Experimental Realization of a Ternary-Phase Alloy Through Microwave-Activated Annealing for Ge Schottky pMOSFETs

Chung-Chun Hsu; Wei-Chun Chi; Yi-He Tsai; Chen-Han Chou; Che-Wei Chen; Hung-Pin Chien; Shang-Shiun Chuang; Guang-Li Luo; Yao-Jen Lee; Chao-Hsin Chien

This paper presents a high-performance Ge p-channel MOSFET (pMOSFET) with NiGePt as a ternary-phase alloy of Schottky source/drain (S/D) formed through low-temperature microwave-activated annealing (MWA). We fabricated a NiGePt alloy contact with uniform crystallinity through structural engineering and MWA. We clarified the phenomena of thermal reaction and diffusion for forming ternary-phase alloys using MWA properties such as thermal dynamics and ionic transportation. The ternary-phase NiGePt alloy is crucial for improving the off-leakage current of the junction. A lower process temperature is beneficial for eliminating surface roughness and reducing alloy agglomeration of the Schottky contact S/D. Consequently, the fabricated NiGePt/n-Ge Schottky junction exhibited a high effective barrier height (ΦBn) of 0.59 eV, resulting in a high junction current ratio of more than 105 at an applied voltage of |Va| = 1 V. In addition, we exploited the advantages of low-temperature microwave annealing to fabricate the pMOSFET, which includes a GeO2 passivation layer and a Schottky S/D. Our ternary Schottky Ge pMOSFET (L = 4μm) exhibited high ION/IOFF ratios of approximately 3.7 × 103 (ID) and 1.3 × 105 (IS) and a moderate subthreshold swing of 126 mV/dec.


IEEE Electron Device Letters | 2016

Improving Thermal Stability and Interface State Density of High-

Yi-He Tsai; Chen-Han Chou; An-Shih Shih; Yu-Hau Jau; Wen-Kuan Yeh; Yu-Hsien Lin; Fu-Hsiang Ko; Chao-Hsin Chien

We propose a new HfGeO<sub>x</sub> interfacial layer (IL) for the high-κ gate-stacks on p-type germanium substrate with improved thermal stability as compared with that of conventional GeO<sub>x</sub> IL. We inserted an additional HfO2 layer after the formation of GeO<sub>x</sub> in the HfO<sub>2</sub>/Al<sub>2</sub>O<sub>3</sub>/GeO<sub>x</sub>/Ge gate-stack by using plasma-enhanced atomic layer deposition. Through the use of post-deposition annealing and post-metal annealing, the new system exhibited greater thermal immunity and was stable up to 600 °C. We speculate that the improvement originates from the formation of HfGeO<sub>x</sub> through the combination of HfO<sub>2</sub> and GeO<sub>x</sub>, according to the thermodynamic data. By incorporating Hf into interfacial layer, the fabricated high-κ gate-stack with an equivalent oxide thickness of 1.2 nm, a low interface states density (D<sub>it</sub>) of approximately 3.3×10<sup>11</sup> eV<sup>-1</sup> cm<sup>-2</sup>, and an impressive gate leakage current of approximately 2.2 × 10<sup>-6</sup> A/cm<sup>2</sup> at V<sub>FB</sub> -1V.


Materials | 2015

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Yu-Hsien Lin; Yi-He Tsai; Chung-Chun Hsu; Guang-Li Luo; Yao-Jen Lee; Chao-Hsin Chien

In this paper, we demonstrated the shallow NiSiGe Schottky junction on the SiGe P-channel by using low-temperature microwave annealing. The NiSiGe/n-Si Schottky junction was formed for the Si-capped/SiGe multi-layer structure on an n-Si substrate (Si/Si0.57Ge0.43/Si) through microwave annealing (MWA) ranging from 200 to 470 °C for 150 s in N2 ambient. MWA has the advantage of being diffusion-less during activation, having a low-temperature process, have a lower junction leakage current, and having low sheet resistance (Rs) and contact resistivity. In our study, a 20 nm NiSiGe Schottky junction was formed by TEM and XRD analysis at MWA 390 °C. The NiSiGe/n-Si Schottky junction exhibits the highest forward/reverse current (ION/IOFF) ratio of ~3 × 105. The low temperature MWA is a very promising thermal process technology for NiSiGe Schottky junction manufacturing.


Journal of Vacuum Science & Technology B | 2018

Stacks by Incorporating Hf into an Interfacial Layer on p-Germanium

Chung-Chun Hsu; Wei-Chun Chi; Yi-He Tsai; Ming-Li Tsai; Shin-Yuan Wang; Chen-Han Chou; Jun Lin Zhang; Guang-Li Luo; Chao-Hsin Chien

In this paper, a method that entails using microwave thermal oxidation to form a high-quality gate dielectric on Ge through surface passivation at considerably low temperatures (<400 °C) is presented. Formation of the GeOx layer was confirmed by x-ray photoelectron spectroscopy. To reduce the bulk trap density and interface trap density (Dit), microwave thermal oxidation was employed for postdeposition microwave thermal oxidation after the deposition of Al2O3 through atomic layer deposition. Tiny frequency dispersion in capacitance measurement and a low Dit value of 5.9 × 1011 cm−2 eV−1 near the midgap confirmed a desirable passivation effect, which was favorable in mitigating the formation of dangling bonds on the Ge surface. A small hysteresis in capacitance was also observed, suggesting that the bulk dielectric was of high quality. On the basis of these characteristics, microwave-activated GeOx is a promising passivation layer material for aggressively scaled Ge-related metal oxide semiconductor devices.In this paper, a method that entails using microwave thermal oxidation to form a high-quality gate dielectric on Ge through surface passivation at considerably low temperatures (<400 °C) is presented. Formation of the GeOx layer was confirmed by x-ray photoelectron spectroscopy. To reduce the bulk trap density and interface trap density (Dit), microwave thermal oxidation was employed for postdeposition microwave thermal oxidation after the deposition of Al2O3 through atomic layer deposition. Tiny frequency dispersion in capacitance measurement and a low Dit value of 5.9 × 1011 cm−2 eV−1 near the midgap confirmed a desirable passivation effect, which was favorable in mitigating the formation of dangling bonds on the Ge surface. A small hysteresis in capacitance was also observed, suggesting that the bulk dielectric was of high quality. On the basis of these characteristics, microwave-activated GeOx is a promising passivation layer material for aggressively scaled Ge-related metal oxide semiconductor devices.


international conference on nanotechnology | 2016

Microwave Annealing for NiSiGe Schottky Junction on SiGe P-Channel

Yu-Che Chou; Chung-Chun Hsu; Cheng-Ting Chun; Chen-Han Chou; Ming-Li Tsai; Yi-He Tsai; Wei-Li Lee; Shin-Yuan Wang; Guang-Li Luo; Chao-Hsin Chien

In this work, we investigated the influence of retrograde-well implantation on hetero-structure body-tied germanium (Ge) FinFET [1]. Using structural engineering, the retrograde well was fabricated prior to Ge epitaxy, which could avoid the activated temperature of dopant in Si substrate. With optimizing the implant condition, the p-Ge/n-Si hetero-structure junction exhibited high I<sub>ON</sub>/I<sub>OFF</sub> ratio and lower junction leakage (4 × 10<sup>-3</sup> μA/cm<sup>2</sup>). Furthermore, we also make a comparison of planar and mesa junction structures, mesa junction exhibited lower junction leakage (6× 10<sup>-6</sup> μA/cm<sup>2</sup>) as compared with the planar one mentioned before, which could be attributed to improvement in peripheral leakage due to dislocation within Ge and Si. Comparing the difference between retrograde-well and implant-free Ge FinFETs, the drain induced barrier lowering (DIBL) was considerably improved by 50 %. Our retrograde-well Ge FinFET exhibited a high I<sub>ON</sub>/I<sub>OFF</sub> ratio ~ 8×10<sup>3</sup> (I<sub>S</sub>) than the conventional Ge FinFET (I<sub>ON</sub>/I<sub>OFF</sub> ~2×10<sup>3</sup>).


IEEE Transactions on Electron Devices | 2017

Integration of microwave-annealed oxidation on germanium metal-oxide-semiconductor devices

Chen-Han Chou; Yi-He Tsai; Chung-Chun Hsu; Yu-Hau Jau; Yu-Hsien Lin; Wen-Kuan Yeh; Chao-Hsin Chien


229th ECS Meeting (May 29 - June 2, 2016) | 2016

Integration of hetero-structure body-tied Ge FinFET using retrograde-well implantation

Yu-Hau Jau; Chen-Han Chou; Yi-He Tsai; Yu-Hsien Lin; Chao-Hsin Chien


IEEE Electron Device Letters | 2018

Experimental Realization of Thermal Stability Enhancement of Nickel Germanide Alloy by Using TiN Metal Capping

Chen-Han Chou; An-Shih Shih; Shao-Cheng Yu; Yu-Hsi Lin; Yi-He Tsai; Chiung-Yuan Lin; Wen-Kuan Yeh; Chao-Hsin Chien


ECS Journal of Solid State Science and Technology | 2018

Enhancing Thermal Stability of Nickel-Germanide Alloy up to 600 °C By Using Metal Passivation

Chen-Han Chou; Yu-Hong Lu; Yi-He Tsai; An-Shih Shih; Wen-Kuan Yeh; Chao-Hsin Chien

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Chao-Hsin Chien

National Chiao Tung University

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Chen-Han Chou

National Chiao Tung University

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Chung-Chun Hsu

National Chiao Tung University

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Yu-Hsien Lin

National United University

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Guang-Li Luo

National Chiao Tung University

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Wen-Kuan Yeh

National University of Kaohsiung

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An-Shih Shih

National Chiao Tung University

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Yao-Jen Lee

National Chiao Tung University

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Yu-Hau Jau

National United University

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