Yool Kang

Double-Patterning Technique Using Plasma Treatment of Photoresist

The double-patterning process was investigated for line-and-space (L/S) patterns of 65 nm half pitch [k1=0.286, 0.85-numerical aperture (NA) ArF dry system] by plasma treatment of photoresist (PR). The sequence of this patterning is exposure–plasma treatment–exposure–etching. Si thin-film passivation and HBr plasma treatment (HPT) were applied, and Si thin-film passivation is preferred to HPT in terms of intermixing prevention and etch selectivity. For planarization of the topographic surface, a thick bottom PR was coated on the pattern after the first exposure. Si thin-film passivation and the thick bottom PR enabled the second exposure to be separated from the first exposure. After the etching process was completed down to the nitride hardmask material, the L/S patterns of 65 nm half pitch were achieved at the full-chip level by virtue of the Si thin-film passivation and thick bottom PR. In the meantime, considering the layout characteristic and process flexibility, layout decomposition and the optical proximity correction (OPC) process were performed. Even though the 65 nm half pitch is defined to be such that k1=0.286, it is believed that this double patterning scheme we suggested can be applied at the minimum pitch over the theoretical limit below 0.25. Consequently, it is expected that the double-patterning technique (DPT) process will have an important role in the extremely low k1 lithography beyond the 32 nm node.

Novel single-layer chemically amplified resist for 193-nm lithography

A new class of photoresist matrix polymer based on alicyclic cyclopolymer was developed for use in ArF single-layer lithography. A novel polymer was synthesized by terpolymerization reaction between tert-butyl methacrylate and alicyclic-maleic anhydride alternating copolymer, which has a hydroxy substituent on the alicyclic group. The polymer showed good solubility in a 2.38 wt% TMAH aqueous solution, high thermal stability up to 180 degrees Celsius, and a good dry- etch resistance against CF4 gas (1.14 times the etching rate of novolak resist). Using an ArF excimer laser exposure system, 0.14 micrometer line and space patterns have been resolved.

Most feasible curing process for ArF resists in device integration aspect

ArF lithography has been successfully implemented for the development of sub-100nm DRAM devices. Such issues as CD (critical dimension) slimming during in-line SEM inspection and low dry etch resistance especially for SiN etch conditions, however, are still latent showstoppers for the production with ArF process. To overcome these problems, there are many efforts for continuous improvements in terms of material and process together with intensive study of new inspection tool and dry etch system. The curing process is one of promising candidates to stabilize the weak ArF resists. Many kinds of curing processes including e-beam curing, thermal curing, plasma curing, UV curing, and VUV (172nm) curing have been studied, and some of them have shown good effects until now. The new curing process with VUV (172nm) showed the most promising results. SEM induced CD slimming of ArF resist improved with 10 sec curing and D/E resistance highly increased with the curing. And there was no particle increase unlike e-beam curing process. And we also found that the re-flow of ArF resist with high Tg above degradation temperature was possible with the VUV curing. In this paper, the mechanism and properties of VUV curing processes will be discussed.

Novel resist material for sub-100-nm contact hole pattern

Thermal flow process using a novel resist called the SMART (SaMsung Advanced Resist for Thermal flow process) was studied. The SMART consists of the conventional polyhydroxystyrene-based polymers and the additives inducing thermal cross-linking reactions with the base polymers. With the SMART resist, 240 nm contact holes were defined by KrF lithography system. Then following one-step thermal flow resulted in down to 90 nm contact holes with vertical sidewall profile. At 90 nm resolution, the critical dimension (CD) variation on 200 mm wafer was less than 20 nm. Its etch selectivity to silicon oxide was improved due to the cross- linking reaction. The main feature of the SMART is one step process having the linear dependency of flow rate on baking temperature. The flow amount can be controlled within the range of 100 - 150 nm without any significant pattern deformation. The thermal flow process using the SMART is a promising candidate for the fabrication of gigabit devices.

Development of resists for thermal flow process applicable to mass production

There are several methods to form small contact holes which are made by optically optimized conditions including PSM, OAI, high NA system. Those methods were very difficult to print sub-130nm contact holes. To print sub-130nm contact holes, we have developed new photoresists for thermal flow process. They could be classified into crosslinking and non-crosslinking system according to whether it could be crosslinked or not during the baking steps. The crosslinking system was consisted of conventional polyhydroxy styrene-based polymers with an additive for cross-linking reactions and the non-crosslinking system was designed by optimized formulation conditions such as molecular weights (Mw), protecting ratio, the amount of photo acid generators and additives. As a result, we obtained 0.13um resolution with 0.6 um DOF by thermal flow process and effectively controlled the flow rate, 10~15nm/ degree(s)C. Also we achieved vertical 90nm contact holes without any pattern deformation.

Improved lithographic performance for resists based on polymers having a vinyl ether-maleic anhydride (VEMA) backbone

ArF lithography, in combination with chemically amplified resists, has been investigated as one of the most promising technologies for producing patterns below 100 nm. In considering the polymer matrix for 193 nm photoresist applications, factors such as sensitivity, transparency to 193 nm radiation, adhesion to substrate, dry etch resistance, ease of synthesis, and availability of monomers are very critical. In these respects, remarkable progress has been made in development of ArF resist material. Polymers of acrylic and methacrylic esters show good imaging performance at 193 nm, but have insufficient dry-etch resistance under oxide or nitride etch condition. On the other hand, cyclic olefin-maleic anhydride (COMA) alternating copolymers exhibit good dry etch resistance, but have poor resolution capability. We previously reported a new platform, based on a vinyl ether-maleic anhydride (VEMA) alternating polymer system, that demonstrated both good resolution and high dry etch resistance. In this paper, VEMA systems with improved lithographic performance are presented. The new platform (VEMA) showed good performance in resolution, depth of focus (DOF), iso-dense bias, and post-etch roughness. With conventional illumination (NA=0.6, sigma=0.7), 120 nm dense line/space patterns with 0.4 (mu) M DOF were resolved. And 90 nm L/S patterns 0.6 (mu) M DOF were resolved with off-axis illumination (NA=0.63). Another important factor to be considered for the dry-etch process is post-etch roughness. In the case of VEMA system a clean surface was observed after etch under oxide, nitride, and poly conditions. The VEMA resist system is regarded as one of the most production-worthy material for real device manufacture.

EUV sensitive photo-acid generator sans chromophore

Recent advances in EUVL lithography is mainly centered on improving the RLS trade-off by employing new resist platforms, bulkier PAGs, EUV sensitizers etc. Among the several new kinds of PAGs proposed till date, the focus of development was mainly on the acid strength, compatibility with resin etc., whilst always retaining the mono, Di or tri phenyl chromophore of the PAG. Herein we report on the use of chromophore-less PAG for the patterning of EUVL resists. Resist performance using model acrylate and PHS based resist was studied. The patterned resists were characterized using SEM. Thermal stability of the PAG was compared with model chromophore containing PAG.

Effect of deprotection activation energy on lithographic performance of EUVL resist

As the feature size becomes smaller, it is difficult for the lithography progress to keep pace with the acceleration of design rule shrinkage and high integration of memory device. Extreme Ultra Violet Lithography (EUVL) is a preferred solution for the 32nm node. In this paper, we have synthesized two types of polymers. One is based on hydroxy phenol, the other is based on hydrocarbon acrylate type polymer. We have diversified each polymer type according to different activation energies for deprotection reaction. In this experiment, we have observed on the resist lithographic performance such as resolution, LER (Line Edge Roughness), photo-sensitivity, and out-gassing during exposure. Different properties according to activation energy were well explained by acid diffusion and polymer free-volume.

Application of bi-layer resist on 70 nm node memory devices

Bi-Layer Resist (BLR) process has been developed as an alternative method to overcome the limit of Single-Layer Resist lithography. Compared to other methods such as Single-Layer Resist (SLR) and Multi-Layer Resist (MLR), BLR has distinct advantages in cost down effect and quick Turn-Around-Time (TAT) due to the reduced number of process steps. In addition, it yields acceptional improvement in the Line-Width Roughness (LWR) on smaller CD. We have obtained feasible results of dense line and space patterning on various devices, which has 70 nm design rule. In this paper, a scanner of NA 0.85 is used and then appropriate condition of dry etch without any grass defect is developed. We are certain that BLR process is a strong candidate approach for the extension technology of ArF lithography and has potentially applicable in various devices.

Fulfillment of model-based OPC for contact patterns in 60-nm level logic device

Dummy contact generation procedure to apply off-axis illumination (OAI) to a contact layer in a 60 nm node device is described. The model based optical proximity correction (OPC) is also adopted to control the on-chip variation (OCV). The dummy contact size of 110 nm with the space distance of 90 nm between the main and dummy contact is used. By applying OPCed contact, the proximity variation is reduced less than 11 nm from 49 nm. The modeling methods are assessed by comparing delta edge placement error (EPE) values, which represent the model accuracy. The VTR_E model is shown to well correct the proximity variation, and it is adopted in our experiment. Applying to the arbitrary patterns of logic device and to generate more dummy patterns, the rule needs to be modified. The modified rule includes the dummy merge method, and the dummy contacts are automatically generated for the contact layer of 60 nm node logic device.