Yukiteru Matsui

High-performance CMP Slurry with Inorganic/Resin Abrasive for Al/Low k Damascene

CMP slurry with inorganic/resin abrasive was investigated for the Al/low k damascene wiring. [1] The slurry showed less scratching, higher polishing rate and better planarity. These advantages are attributable to the elasticity of the resin. The soft resin particle behaves as a cushion and prevents the scratching caused by agglomerated inorganic particles and foreign material. The springy feature of the resin particle increases the selectivity of removal rate at convex portions and concave portions. Furthermore, the pressure is loaded to the Al film surface effectively through the resin particle and higher CMP rate can be achieved even without chemicals such as oxidizers and acids. [2] This chemical free polishing would be the advantageous for preventing the corrosion of Al.

Challenges of CMP technology for 3D memories

This paper presents an overview of technical trends and challenges of CMP technology for 3D memories. Large-capacity nonvolatile memories have been expanding the market for external storage devices for mobile products, and are utilized in all areas of peoples daily lives. Toshibas memory business has consistently realized innovations in various leading-edge technologies as the inventor of flash memory. Although the challenges over the physical scaling limit will become steep, we are aiming to overcome such issues by making use of our long-accumulated experience and record of innovations [1]. Ultrahigh-density memory technologies to realize a three-dimensional (3D) memory cell array have been attracting considerable interest as a solution to deal with the continuous increase in bit density and reduction of bit cost expected in the future. Applying its proprietary technologies, Toshiba has developed the worlds first bit-cost scalable (BiCS) flash memory technology to achieve a 3D memory cell array with an extremely low fabrication cost [2]. A feature of BiCS technology is that a whole stack of electrode plates is punched through and plugged by another material to form a three-dimensional memory cell array as shown in Fig. 1. This fabrication process is expected to achieve a continuous reduction in bit-cost, since the number of processes will not significantly rise against increases in the number of layers for future ultrahigh-density memories [3] [4]. The planarization method by chemical mechanical polishing (CMP) has become the standard technology for semiconductor device manufacturing. Important challenges of the CMP technology for the 3D memory manufacturing are higher planarity and higher productivity. BiCS requires higher planarity of interlayer dielectric film (ILD) in staircase and peripheral region. The maximum step height is much larger than that of 2D flash memory devices due to formation of the stacked films. Therefore, it becomes very difficult to obtain higher planarity. Furthermore, BiCS requires large number of CMP process steps because of formation of plugs and wirings in staircase region compared with 2D flash memory devices. Throughput enhancement of CMP process is necessary for higher productivity. Innovative CMP technologies to realize higher planarity and higher productivity are expected for next generation 3D memory devices.

High Performance Photoresist Planarization Process by CMP with Resin Abrasive for Trench-First Cu/Low-k Dual Damascene Process

High performance photoresist planarization technology by chemical mechanical polishing (CMP) was developed for the trench-first Cu/low-k dual damascene (DD) process to reduce the focus error in the lithography process. To improve the planarity for the wide trench area, the planarization properties of alumina and resin-based slurries were investigated for different resist baking temperatures. Excellent planarity was obtained by high resist baking temperatures and using alumina slurry. However it became clear that the scratches caused by alumina particles were a critical issue for yield improvement. To improve the planarity and reduce the scratch density, the CMP process with a soft resin-based slurry at a low resist baking temperature was investigated. The addition of a nonionic water-soluble polymer to the resin particles was quite effective for planarity improvement, and the scratch level could be kept low by using soft resin abrasion. The resist planarization technology with a resin-based slurry was adapted to the trench-first DD process. The focus error was reduced and the process window in the lithography process was enhanced compared to the conventional process without a resist CMP, indicating that the resist planarization technology could be a strong tool for the 45 nm technology node and beyond.

Focus error reduction by photo-resist planarization in via-first dual damascene process

In order to reduce the focus error for the stacked mask process (SMAP) used in Cu/low-k dual damascene (DD) interconnect, a planarization technology of the under layer film by CMP was developed. Photo-resist was used for the under layer film. CMP slurry with resin abrasive was investigated for the photo-resist planarization. The slurry showed better planarity, lower risk to particle residue, and high selectivity to SiO/sub 2/ film. These advantages are attributable to the effects of the particle size and the material characteristics similar to photo-resist. Furthermore, it was found that it is effective for a higher CMP rate to turn the platen and head with lower rotational speed. Using the photo-resist planarization technology, application to via first DD process was investigated. It became clear that focus error reduction of 0.1 /spl mu/m is confirmed compared with conventional SMAP. The depth of focus (DOF) margin loss due to resist thickness variation caused by via density variation is completely canceled by photo-resist planarization.