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international interconnect technology conference | 2005

Focus error reduction by photo-resist planarization in via-first dual damascene process

Yukiteru Matsui; Gaku Minamihaba; Yoshikuni Tateyama; K. Takahata; Atsushi Shigeta; Takeshi Nishioka; Hiroyuki Yano; Nobuo Hayasaka

In order to reduce the focus error for the stacked mask process (SMAP) used in Cu/low-k dual damascene (DD) interconnect, a planarization technology of the under layer film by CMP was developed. Photo-resist was used for the under layer film. CMP slurry with resin abrasive was investigated for the photo-resist planarization. The slurry showed better planarity, lower risk to particle residue, and high selectivity to SiO/sub 2/ film. These advantages are attributable to the effects of the particle size and the material characteristics similar to photo-resist. Furthermore, it was found that it is effective for a higher CMP rate to turn the platen and head with lower rotational speed. Using the photo-resist planarization technology, application to via first DD process was investigated. It became clear that focus error reduction of 0.1 /spl mu/m is confirmed compared with conventional SMAP. The depth of focus (DOF) margin loss due to resist thickness variation caused by via density variation is completely canceled by photo-resist planarization.


Archive | 2003

Aqueous dispersion for chemical mechanical polishing, chemical mechanical polishing process, production process of semiconductor device and material for preparing an aqueous dispersion for chemical mechanical polishing

Kazuo Nishimoto; Tatsuaki Sakano; Akihiro Takemura; Masayuki Hattori; Nobuo Kawahashi; Naoto Miyashita; Atsushi Shigeta; Yoshitaka Matsui; Kazuhiko Ida


Archive | 1993

Method for planarizing a semiconductor device having a amorphous layer

Masako Kodera; Hiroyuki Yano; Atsushi Shigeta; Riichirou Aoki; Hiromi Yajima; Haruo Okano


Archive | 1997

Polishing apparatus and method for planarizing layer on a semiconductor wafer

Masako Kodera; Hiroyuki Yano; Atsushi Shigeta; Riichirou Aoki; Hiromi Yajima; Haruo Okano


Archive | 1995

Method for planarizing a semiconductor body by CMP method and an apparatus for manufacturing a semiconductor device using the method

Masako Kodera; Atsushi Shigeta; Shiro Mishima; Hiromi Yajima; Riichirou Aoki


Archive | 1995

Semiconductor planarizing apparatus

Masako Kodera; Hiroyuki Yano; Atsushi Shigeta; Riichirou Aoki; Hiromi Yajima; Haruo Okano


Archive | 2004

Chemical mechanical polishing method of organic film and method of manufacturing semiconductor device

Yukiteru Matsui; Gaku Minamihaba; Yoshikuni Tateyama; Hiroyuki Yano; Atsushi Shigeta


Archive | 2002

Method of inspecting process for manufacturing semiconductor device and method of manufacturing semiconductor device

Takeo Kubota; Atsushi Shigeta


Archive | 2009

CHEMICAL MECHANICAL POLISHING METHOD AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE

Hirotaka Shida; Yukiteru Matsui; Atsushi Shigeta; Shinichi Hirasawa; Hirokazu Kato; Masako Kinoshita; Takeshi Nishioka; Hiroyuki Yano


Archive | 2006

Peripheral processing method and method of manufacturing a semiconductor device

Takeo Kubota; Atsushi Shigeta; Kaori Yomogihara; Makoto Honda; Hirokazu Ezawa

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