Zhiwei Liu

An Improved Bidirectional SCR Structure for Low-Triggering ESD Protection Applications

An improved dual-polarity silicon-controlled rectifier (SCR) device has been proposed and realized in a 0.6-mum bipolar complementary metal-oxide-semiconductor process. The device can be used to protect electrostatic discharge (ESD) in both the positive and negative directions on pins with a voltage range that goes below ground. Comparing with the conventional bidirectional SCR structures, the new device is more suitable for low-voltage integrated circuit ESD protection applications because it possesses a smaller trigger voltage, a smaller leakage current, and a larger holding voltage.

Novel Silicon-Controlled Rectifier (SCR) for High-Voltage Electrostatic Discharge (ESD) Applications

Electrostatic discharge (ESD) protection for high-voltage integrated circuits is challenging due to the requirement of high holding voltage to minimize the risk of ESD-induced latchup and electrical overstress. In this letter, a new silicon-controlled rectifier (SCR) is developed for this particular application. The SCR is designed based on the concept that the holding voltage can be increased by reducing the emitter injection efficiency in the SCR. This is accomplished by using a segmented emitter topology. Experimental data show that the new SCR can possess a holding voltage that is larger than 40 V and a failure current It2 that is higher than 28 mA/mum.

Silicon-Controlled Rectifier Stacking Structure for High-Voltage ESD Protection Applications

Latchup immunity is a challenging issue for the design of power supply clamps used in high-voltage electrostatic discharge (ESD) protection applications. While silicon-controlled rectifiers (SCRs) are highly robust ESD devices, they are traditionally not suited for high-voltage ESD due to their inherent low holding voltage and, thus, vulnerability to latchup. In this letter, a novel SCR stacking structure with an extremely high holding voltage, very small snapback, and acceptable failure current has been developed. The new and existing high holding voltage ESD devices are also compared to demonstrate the advancement of this work.

TCAD Methodology for Design of SCR Devices for Electrostatic Discharge (ESD) Applications

Realization of on-chip electrostatic discharge (ESD) protection requires extensive technical experience and know-how. A technology computer-aided design (TCAD) methodology aimed to assist in the design and implementation of robust ESD devices is developed and presented. The methodology provides a systematic and practical means for the evaluation and optimization of ESD devices in a simulation environment. Advanced silicon-controlled-rectifier devices are considered to illustrate the approach, and experimental data measured from these devices are also included in support of the TCAD development

Effect of annealing on charge transfer in Ge nanocrystal based nonvolatile memory structure

Ge nanocrystals (nc-Ge) embedded in the gate oxide of the nonvolatile memory structure were synthesized by Ge ion implantation followed by thermal annealing at 800 °C for various durations. Large changes in the structural and chemical properties of the Ge+-implanted oxide have been observed, and they have been found to possess a significant impact on the charge transfer in the oxide layer. The distribution and concentration of the nc-Ge and dissolved Ge atoms which serve as both the charge storage and transfer sites in the oxide are affected by the annealing. Two charge transfer mechanisms, i.e., the lateral charge diffusion along the Ge-distributed layer and the charge leakage from the charge storage sites to the Si substrate via the charge transfer sites, have been identified based on the charge retention behaviors. Both mechanisms are enhanced by the annealing as a result of the change in the distribution and concentration of the charge transfer sites.

Robust ESD Protection Solutions in CMOS/BiCMOS Technologies

Robust and novel devices called High Holding, Low-Voltage-Trigger Silicon Controlled Rectifiers (HH-LVTSCRs) for Electrostatic Discharge (ESD) protection of integrated circuits (ICs) are designed, fabricated and characterized. The S-type current-voltage (I-V) characteristics of the HH-LVTSCRs are adjustable to different operating conditions by changing the device dimensions and terminal interconnections. Experimental results demonstrate that HH-LVTSCRs with a multiple-finger layout render high levels of ESD protection per unit area, applicable in the design of ICs with stringent ESD protection requirements of over 15 kV IEC.

A New Analytical Subthreshold Potential/Current Model for Quadruple-Gate Junctionless MOSFETs

In this paper, we built potential and current models for quadruple-gate junctionless filed-effect transistor (QGJLFET) in subthreshold regime. A new potential distribution function is provided for the cross section of QGJLFETs, based on which we derived a more accurate expression of natural length for QGJLFETs. The result shows that a quadruple-gate FET is far more than a simple composition of two double-gate FETs, but with some coupling components. To avoid complex computation of potential near the corner, we come up with a new concept of equivalent insulator thickness, transforming the influence of corner into the change of insulator thickness. With these renewed parameters and scaling equation, the potential distribution in channel is finally obtained. Based on this potential model, subthreshold current is derived using drift-diffusion approach and Pao-Sah integral.

FinFET: From compact modeling to circuit performance

FinFET device, the promise one of all candidates which may extend CMOS scaling to 10nm and beyond, has attracted intensive research interest in recent years. In paralleling the process technology and circuit design methodology, a compact model which serves as a link between the process technology and circuit design is strongly demanded. In this paper, we first review the FinFET process technology including SOI-FinFET and bulk-FinFET. Then a potential-based compact model is proposed to describe the electrical characteristics of the FinFET transistor. The model is verified by 2-D numerical simulation and is implemented into HSPICE simulator. Finally, the reliability issue of the FinFET device and circuit functions are illustrated and analyzed, which are important for the practical applications and circuit design.

Abnormal Differentiation of Dental Pulp Cells in Cleidocranial Dysplasia

Cleidocranial dysplasia (CCD) is a skeletal dysplasia caused by heterozygous mutations of RUNX2, a gene that is essential for the mineralization of bone and tooth. We isolated primary dental pulp cells from a 10-y-old patient and tested their proliferative capacity, alkaline phosphatase activity, and ability to form mineralized nodules, in comparison with those from 7 healthy children. All these measures were reduced in primary dental pulp cells from the CCD patient. The expression of the osteoblast/odontoblast-associated genes RUNX2, ALP, OCN, and DSPP was also found to be significantly decreased in the primary dental pulp cells of the CCD patient. The osteoclast-related markers TRAP, CTSK, CTR, and MMP9 were decreased in primary dental pulp cells cocultured with human peripheral blood mononuclear cells. Moreover, the expression of RANKL and the ratio of RANKL/OPG were both reduced in the cells from the CCD patient, indicating that the RUNX2 mutation interfered with the bone-remodeling pathway and decreased the capacity of primary dental pulp cells to support osteoclast differentiation. These effects may be partly responsible for the defects in tooth development and the retention of primary teeth that is typical of CCD.

Static dielectric constant of Al nanocrystal/Al2O3 nanocomposite thin films determined by the capacitance-voltage reconstruction technique

Al nanocrystal (nc-Al)/Al2O3 nanocomposite thin films were synthesized by radio-frequency magnetron sputtering. The static dielectric constant (er) of the nanocomposite thin films was determined by the capacitance-voltage reconstruction technique which was able to correct for the influence of high current conduction in the thin films. In contrast to pure Al2O3, the nanocomposite has a much higher er and its er exhibits strong temperature dependence also. The higher er is attributed to the dipole effect of the Al–O dangling bonds due to the presence of nc-Al in the Al2O3 matrix. However, the dipole effect degrades at a higher temperature, which explains the observed decrease in er with increasing temperature.