Aftab Nazir

Observation of diameter dependent carrier distribution in nanowire-based transistors

The successful implementation of nanowire (NW) based field-effect transistors (FET) critically depends on quantitative information about the carrier distribution inside such devices. Therefore, we have developed a method based on high-vacuum scanning spreading resistance microscopy (HV-SSRM) which allows two-dimensional (2D) quantitative carrier profiling of fully integrated silicon NW-based tunnel-FETs (TFETs) with 2 nm spatial resolution. The key elements of our characterization procedure are optimized NW cleaving and polishing steps, the use of in-house fabricated ultra-sharp diamond tips, measurements in high vacuum and a dedicated quantification procedure accounting for the Schottky-like tip-sample contact affected by surface states. In the case of the implanted TFET source regions we find a strong NW diameter dependence of conformality, junction abruptness and gate overlap, quantitatively in agreement with process simulations. In contrast, the arsenic doped drain regions reveal an unexpected NW diameter dependent dopant deactivation. The observed lower drain doping for smaller diameters is reflected in the device characteristics by lower TFET off-currents, as measured experimentally and confirmed by device simulations.

Ultra Shallow Arsenic Junctions in Germanium Formed by Millisecond Laser Annealing

DTU Orbit (15/03/2019) Ultra Shallow Arsenic Junctions in Germanium Formed by Millisecond Laser Annealing Millisecond laser annealing is used to fabricate ultra shallow arsenic junctions in preamorphized and crystalline germanium, with peak temperatures up to 900 degrees C. At this temperature, As indiffusion is observed while yielding an electrically active concentration up to 5.0 x 10(19) cm(-3) for a junction depth of 31 nm. Ge preamorphization and the consecutive solid phase epitaxial regrowth are shown to result in less diffusion and increased electrical activation. The recrystallization of the amorphized Ge layer during laser annealing is studied using transmission electron microscopy and spectroscopic ellipsometry.

A comprehensive model for the electrical nanocontact on germanium for scanning spreading resistance microscopy applications

Quantitative carrier profiling represents a key element in the process development of future nanoelectronic devices. During the last decade, scanning spreading resistance microscopy (SSRM) has evolved as the method of choice for two-dimensional carrier mapping due to its unique spatial resolution and high sensitivity when applied to silicon (Si)-based devices. While the electrical nanocontact between a SSRM probe and Si is well documented, the insight is insufficient to understand or make predictions about the properties of the SSRM contact in case of high-mobility germanium (Ge) samples. Therefore, we present in this paper a model describing this contact in more detail, taking into account the effects of the applied pressure as this leads to the formation of a β-Sn pocket right underneath the probe and a spatially non-homogeneous bandgap reduction in the underlying Ge. The resistance probed through the resulting Schottky contact is further influenced by the dimensions of the nanocontact and in particular...

A Low-Power HKMG CMOS Platform Compatible With Dram Node 2× and Beyond

In this paper, a low-cost and low-leakage gate-first high-k metal-gate CMOS integration compatible with the high thermal budget used in a 2× node dynamic random access memory process flow is reported. The metal inserted polysilicon stack is based on HfO2 coupled with Al2O3 capping for pMOS devices, and with a TiN/Mg/TiN stack together with As ion implantation for nMOS. It is demonstrated that n and pMOS performance of 400 and 200 μA/μm can be obtained for an OFF-state current of 10-10 A/μm, while maintaining gate and junction leakages compatible with low-power applications. Reliability and matching properties are aligned with logic gate-stacks, and the proposed solution is outperforming the La-cap-based solutions in terms of thermal stability.

Fast Fourier transform scanning spreading resistance microscopy: a novel technique to overcome the limitations of classical conductive AFM techniques.

A new atomic force microscopy (AFM)-based technique named fast Fourier transform scanning spreading-resistance microscopy (FFT-SSRM) has been developed. FFT-SSRM offers the ability to isolate the local spreading resistance (Sr) from the parasitic series resistance (probe, bulk, and back contact). The parasitic series resistance limits the use of classical SSRM in confined volumes and on very highly doped materials, two increasingly important situations in nanoelectronic components. This is realized via a force modulation at controlled frequency (affecting the SR component) and the extraction of the resistance amplitude at the modulation frequency, performing an FFT-based lock-in deconvolution. A systematic evaluation of the FFT-SSRM performances (i.e., resolution, dynamic range, sensitivity, and repeatability) is presented. The impact of various parameters (i.e., modulation frequency and amplitude or cutoff frequency of the current amplifier) on the performances of FFT-SSRM has been evaluated. We demonstrate the possibility to overcome sensitivity losses due to tip saturation in highly doped material and the utility of the technique in two different structures, presenting isolated and confined volumes.

Accurate Prediction of Device Performance Based on 2-D Carrier Profiles in the Presence of Extensive Mobile Carrier Diffusion

In this paper, we illustrate how high-resolution 2-D carrier profiles from scanning spreading resistance microscopy (SSRM) can be used to predict and understand device performance of dynamic random access memory peripheral transistors with high-k metal gate and ultrashallow junctions. In an earlier study on high-speed complementary metal-oxide-semiconductor logic, the 2-D carrier profiles from SSRM were used as the active 2-D dopant profile input to the device simulator as they are virtually identical. The extensive mobile carrier diffusion caused by the lower concentrations, however, implies a strong difference between the mobile carrier distribution and the dopant distribution such that the same approach is no longer valid. Ideally one would have to generate, based on the carrier profiles, the active dopant distribution through the inverse solution of the Poisson equation (in two dimensions) which is, however, numerically nontrivial and often leads to nonunique results. Therefore, an alternative approach is proposed here, whereby we fine-tune the process simulations such that the resulting simulated carrier profiles match the 2-D SSRM profiles. Upon reaching satisfactory agreement, the simulated profiles can be used as input for a device simulator and be used to predict sensitive device parameters such as drain-induced barrier lowering and threshold voltage rolloff.

Understanding device performance by incorporating 2D-carrier profiles from high resolution scanning spreading resistance microscopy into device simulations

We developed a procedure and software allowing us to predict and understand device performance by incorporating 2D-carrier profiles from high resolution scanning spreading resistance microscopy into a device simulator. We demonstrate the incorporation of the quantified SSRM 2D-profiles into a device simulator using data collected on p-MOSFETs. Based on these profiles the simulator now predicts the electrical characteristics of the device in excellent agreement with the experimental device results, whereas calculations based on (advanced calibration) process simulations showed significant discrepancies. With this approach the difficult and time consuming calibration step of the process simulation can be circumvented and device results can be interpreted directly based on the details of the real 2D-carrier profiles.