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Dive into the research topics where Alec J. Morton is active.

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Featured researches published by Alec J. Morton.


Educational Technology & Society | 2000

DSP & analog SOC integration in the Internet era

Dennis Buss; Amitava Chatterjee; Taylor R. Efland; Brian L. Evans; Harold D. Goodpaster; Baher Haroun; James R. Hellums; William R. Krenik; Alec J. Morton; H. Shichijo; Chin Yu Tsai; Thomas R. Vrotsos

In the PC era, microprocessors and memory were the semiconductor components that drove the PC industry. In the Internet era, DSP and analog functions will drive the Internet access industry. System-on-a-chip (SOC) integration will be the primary technology driver along with continuing Moores law. This paper discusses the device issues on the integration of analog baseband, small signal RF functions and power management function together with low cost, high density, deep submicron digital CMOS. The integration will require creative new analog and RF device design together with creative circuit techniques.


Archive | 2000

Higher voltage transistors for sub micron CMOS processes

Alec J. Morton; Taylor R. Efland; Chin-Yu Tsai; Jozef Mitros; Dan M. Mosher; Sam Shichijo; Keith E. Kunz


Archive | 2002

Methods and devices for optimized digital and analog CMOS transistor performance in deep submicron technology

Taylor R. Efland; Alec J. Morton; Chin-Yu Tsai


Archive | 2005

Embedded eeprom array techniques for higher density

Alec J. Morton; Jozef Mitros


Archive | 2000

METHOD TO PARTIALLY OR COMPLETELY SUPPRESS POCKET IMPLANT IN SELECTIVE CIRCUIT ELEMENTS WITH NO ADDITIONAL MASK IN A CMOS FLOW WHERE SEPARATE MASKING STEPS ARE USED FOR THE DRAIN EXTENSION IMPLANTS FOR THE LOW VOLTAGE AND HIGH VOLTAGE TRANSISTORS

Amitava Chatterjee; Alec J. Morton; Mark S. Rodder; Taylor R. Efland; Chin-Yu Tsai; James R. Hellums


Archive | 1997

Method for current ballasting and busing over active device area using a multi-level conductor process

Taylor R. Efland; Satwinder Malhi; Michael C. Smayling; Joseph A. Devore; Ross E. Teggatz; Alec J. Morton


Archive | 2000

Integrated bipolar junction transistor for mixed signal circuits

Seetharaman Sridhar; Amitava Chatterjee; H. Shichijo; Alec J. Morton


european solid-state device research conference | 2000

High-Voltage Drain Extended MOS Transistors for 0.18 um Logic CMOS Process

Jozef Mitros; Chin-Yu Tsai; H. Shichijo; Keith E. Kunz; Alec J. Morton; Doug Goodpaster; Dan M. Mosher; Taylor R. Efland


Archive | 2004

Interconnect and a method of manufacture therefor

Betty Mercer; Erika Leigh Shoemaker; Byron Williams; Laurinda Ng; Alec J. Morton; C. Thompson


Archive | 1995

Device having current ballasting and busing over active area using a multi-level conductor process

Taylor R. Efland; Satwinder Malhi; Michael C. Smayling; Joseph A. Devore; Ross E. Teggatz; Alec J. Morton

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