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Dive into the research topics where Alexis Franquet is active.

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Featured researches published by Alexis Franquet.


Nano Letters | 2014

Three-dimensional observation of the conductive filament in nanoscaled resistive memory devices.

Umberto Celano; Ludovic Goux; Attilio Belmonte; Karl Opsomer; Alexis Franquet; Andreas Schulze; Christophe Detavernier; Olivier Richard; Hugo Bender; Malgorzata Jurczak; Wilfried Vandervorst

The basic unit of information in filamentary-based resistive switching memories is physically stored in a conductive filament. Therefore, the overall performance of the device is indissolubly related to the properties of such filament. In this Letter, we report for the first time on the three-dimensional (3D) observation of the shape of the conductive filament. The observation of the filament is done in a nanoscale conductive-bridging device, which is programmed under real operative conditions. To obtain the 3D-information we developed a dedicated tomography technique based on conductive atomic force microscopy. The shape and size of the conductive filament are obtained in three-dimensions with nanometric resolution. The observed filament presents a conical shape with the narrow part close to the inert-electrode. On the basis of this shape, we conclude that the dynamic filament-growth is limited by the cation transport. In addition, we demonstrate the role of the programming current, which clearly influences the physical-volume of the induced conductive filaments.


Journal of The Electrochemical Society | 2008

Atomic Layer Deposition of Hafnium Oxide on Ge and GaAs Substrates: Precursors and Surface Preparation

Annelies Delabie; David P. Brunco; Thierry Conard; Paola Favia; Hugo Bender; Alexis Franquet; Sonja Sioncke; Wilfried Vandervorst; Sven Van Elshocht; Marc Heyns; Marc Meuris; Eunji Kim; Paul C. McIntyre; Krishna C. Saraswat; James M. LeBeau; Joël Cagnon; Susanne Stemmer; W. Tsai

To increase complementary metal oxide semiconductor (CMOS) device performance, new materials are introduced in the gate stack (high-k dielectrics and metal gates) and the transistor channel (Ge, III-V materials). In this work we study the atomic layer deposition (ALD) of hafnium oxide on Ge and GaAs substrates. Passivation layers are required to achieve a sufficiently low interface state density, but these might also influence the growth behavior and dielectric quality. Therefore, we investigate the effect of surface preparation, for example, native oxide, wet clean, thermal oxidation, and S-passivation, for the HfCl 4 /H 2 O and tetrakis diethylamino hafnium = ((C 2 H 5 ) 2 N) 4 Hf (TDEAH)/H 2 O processes. The growth of HfO 2 from initial submonolayer coverage to continuous HfO 2 film is studied by means of Rutherford backscattering, static time-of-flight secondary ion mass spectroscopy, and X-ray photoelectron spectroscopy. HfCl 4 /H 2 O ALD depends on the surface preparation. The growth is enhanced on oxide surfaces (thermally grown GeO 2 , HF-cleaned Ge, and GaO x -ASO y ) and inhibited on oxide-free substrates (HBr-cleaned Ge). The initial island growth regime is least pronounced on germanium oxide. In contrast, TDEAH/H 2 O ALD is independent of the surface preparation. The growth is inhibited in the first ∼20 cycles on native oxide and S-passivated GaAs [(NH 4 ) 2 S treatment], but the initial island growth regime is quickly followed by the two-dimensional growth regime.


international electron devices meeting | 2013

Vacancy-modulated conductive oxide resistive RAM (VMCO-RRAM): An area-scalable switching current, self-compliant, highly nonlinear and wide on/off-window resistive switching cell

Bogdan Govoreanu; Augusto Redolfi; Leqi Zhang; Christoph Adelmann; Mihaela Ioana Popovici; Sergiu Clima; Hubert Hody; V. Paraschiv; Iuliana Radu; Alexis Franquet; Jen-Chieh Liu; Johan Swerts; Olivier Richard; Hugo Bender; Laith Altimime; Malgorzata Jurczak

We report a novel self-compliant and self-rectifying resistive switching memory cell, with area-scalable switching currents, featuring a set current density of ~5nA/nm2 (<;9uA for a 40nm-size cell), high on-state half-bias nonlinearity of 102 and low reset current density of <;0.6nA/nm2 (<;1uA@40nm size). The cell can be operated at below ±4V/10ns, with a large on/off window of >102 and retention extrapolates to 10yr at 101°C. The switching stack is fully based on ALD processes, using common high-k dielectrics and has a thickness of <;10nm, meeting the 3D Vertical RRAM requirements. Moreover, we point out the nonlinearity-low-current operation interdependence and discuss the scaling potential of the areal switching RRAM for reliable sub-μA current operation in the 10nm-cell size realm.


Applied Physics Letters | 2011

Molecular beam deposition of Al2O3 on p-Ge(001)/Ge0.95Sn0.05 heterostructure and impact of a Ge-cap interfacial layer

Clement Merckling; X. Sun; Yosuke Shimura; Alexis Franquet; Benjamin Vincent; Shotaro Takeuchi; Wilfried Vandervorst; Osamu Nakatsuka; Shigeaki Zaima; Roger Loo; Matty Caymax

We investigated the molecular beam deposition of Al2O3 on Ge0.95Sn0.05 surface with and without an ultra thin Ge cap layer in between. We first studied the atomic configuration of both Ge1−xSnx and Ge/Ge1−xSnx surfaces after deoxidation by reflection high-energy electron diffraction and resulted, respectively, in a c(4×2) and (2×1) surface reconstructions. After in situ deposition of an Al2O3 high-κ gate dielectric we evidenced using time-of-flight secondary ion mass spectroscopy analyses that Sn diffusion was at the origin of high leakage current densities in the Ge1−xSnx/Al2O3 gate stack. This damage could be avoided by inserting a thin 5-nm-thick Ge cap between the oxide and the Ge1−xSnx layer. Finally, metal-oxide-semiconductor capacitors on the Ge capped sample showed well-behaved capacitance-voltage (C-V) characteristics with interface trap density (Dit) in the range of 1012 eV−1 cm−2 in mid gap and higher close to the valence band edge.


Applied Physics Letters | 2008

Thermal stability of dysprosium scandate thin films

C. Adelmann; S. Van Elshocht; Alexis Franquet; Thierry Conard; O. Richard; Hugo Bender; P. Lehnen; S. De Gendt

The thermal stability of DyScO3 thin films in contact with SiO2 or HfO2 during annealing up to 1000°C has been studied. It is found that DyScO3∕SiO2 stacks react during annealing and a phase separation into polycrystalline Sc-rich (and relatively Si-poor) DySc silicate on top of an amorphous Dy-rich DySc silicate is observed. In contrast, DyScO3 is found to be thermodynamically stable in contact with HfO2 and to recrystallize upon annealing. These results demonstrate that the previously reported high crystallization temperature of >1000°C for DyScO3 is not an intrinsic material property but caused by silicate formation.


Journal of The Electrochemical Society | 2010

Impact of Precursor Chemistry and Process Conditions on the Scalability of ALD HfO2 Gate Dielectrics

Johan Swerts; Nick Peys; Laura Nyns; Annelies Delabie; Alexis Franquet; Jan Maes; Sven Van Elshocht; Stefan De Gendt

The downscaling of high-k/metal gate transistor devices requires thin-film deposition processes that deliver not only an outstanding high-k oxide quality, but also a strict interfacial oxide thickness control in the sub-1 nm thickness range. To study the impact of atomic layer deposition (ALD) process conditions and chemistry on the HfO 2 quality and interfacial oxide thickness, we have used tetrakis[ethylmethylamino]hafnium (TEMAH) as a metal precursor and H 2 O and 0 3 as oxidants. The deposition temperature ranged from 285 up to 365 °C, where TEMAH decomposition plays a role in the growth mechanism. Physical characterization and Pt dot capacitor devices have been used to study the impact of the oxidant and process conditions on the equivalent oxide thickness and gate leakage current of 2-4 nm thin HfO 2 films. By combining X-ray reflectometry and ellipsometry, we evaluated the Si/high-k interfacial oxide layer thickness. Time-of-flight secondary-ion mass spectroscopy was used to determine the C impurity levels. Both the interfacial oxide layer thickness and the C impurity level in the Si/SiO 2 /HfO 2 stacks are strongly dependent on the oxidant. The temperature dependence of the C impurity level is opposite for O 3 and H 2 O. Furthermore, SiO 2 regrowth was found for the 0 3 process.


Journal of The Electrochemical Society | 2009

H2O- and O3-based atomic layer deposition of high-K dielectric films on GeO2 passivation layers

Annelies Delabie; Ali Reza Alian; Florence Bellenger; Matty Caymax; Thierry Conard; Alexis Franquet; Sonja Sioncke; S. Van Elshocht; Marc Heyns; Marc Meuris

Atomic layer deposition (ALD) is considered an enabling technique for the deposition of dielectrics on sensitive surfaces such as germanium. Proper control of the interfacial layer between Ge and the high-κ layer has been shown to be crucial for obtaining good performance of Ge-based metal-oxide-semiconductor devices. In this work, we compare O 3 - and H 2 O-based ALD of HfO 2 and Al 2 O 3, and report on the thickness and electrical quality of GeO 2 passivation layers. The thickness of the interfacial layer depends on the oxidant used and affects the interface state density. A small degree of intermixing at the GeO 2 /high-κ interface is observed for all ALD process conditions. The interface state density can be significantly reduced by annealing the Pt-gated capacitors in forming gas (H 2 /N 2 ) at 300°C. After annealing, the interface state density becomes almost independent of the thickness of the GeO 2 passivation layer.


Journal of Vacuum Science & Technology B | 2010

Effect of energetic ions on plasma damage of porous SiCOH low-k materials

Eddy Kunnen; Mikhail R. Baklanov; Alexis Franquet; Denis Shamiryan; T. V. Rakhimova; Adam Urbanowicz; Herbert Struyf; Werner Boullart

Plasma damage of SiCOH low-k films in an oxygen plasma is studied using a transformer coupled plasma reactor. The concentration of oxygen atoms and O2+ ions is varied by using three different conditions: (1) bottom power only, (2) bottom and top power, and (3) top power only. After plasma exposure, the low-k samples are characterized by various experimental techniques. It is shown that the ion bombardment induced by the bottom power minimizes the plasma damage by increasing the recombination coefficient of oxygen radicals. Contrary to the expectations, the densification of the top surface by ion radiation was limited. The increase in the recombination coefficient is mainly provided by modification of the pore wall surface and creation of chemically active sites stimulating the recombination of oxygen atoms. The results show that a reduction in plasma damage can be achieved without sealing of low-k top surface.


Journal of The Electrochemical Society | 2006

Metallorganic Chemical Vapor Deposition of Dysprosium Scandate High-k Layers Using mmp-Type Precursors

S. Van Elshocht; P. Lehnen; B. Seitzinger; A. Abrutis; C. Adelmann; Bert Brijs; Matty Caymax; Thierry Conard; S. De Gendt; Alexis Franquet; C. Lohe; M. Lukosius; Alain Moussa; O. Richard; P. Williams; Thomas Witters; Paul Zimmerman; Marc Heyns

Rare-earth scandate materials have been identified as candidates for gate dielectrics in metal oxide semiconductor transistors because of their high thermal stability against crystallization in combination with a high-dielectric constant. In this study, tris(1-methoxy-2-methyl-2-propoxy)dysprosium [Dy(mmp) 3 ] and Sc(mmp) 3 are evaluated as metallorganic chemical vapor deposition precursors for deposition of Dy x Sc y O z on silicon at moderate temperatures (450-600°C). These temperatures allow easy integration into a standard transistor flow. The layers are uniform with a close to bulk density and smooth top surface. Electrical characterization measurements shows a gate leakage current of 1.8 X 10 -5 A/cm 2 at 4.5 V for an equivalent oxide thickness of 2.0 nm. Limited hysteresis (9 mV) and frequency dispersion (3% difference in accumulation capacitance between 10 and 250 kHz) was observed.


Journal of Applied Physics | 2011

S-passivation of the Ge gate stack: Tuning the gate stack properties by changing the atomic layer deposition oxidant precursor

Sonja Sioncke; H. C. Lin; Laura Nyns; Guy Brammertz; Annelies Delabie; Thierry Conard; Alexis Franquet; Jens Rip; Herbert Struyf; S. De Gendt; Matthias Müller; Burkhard Beckhoff; Matty Caymax

The passivation of the interface between Ge and the gate dielectric is a critical issue for the integration of Ge into next generation CMOS devices. GeO2 has recently garnered a lot of interest, but there is always a trade-off between low interface state densities and a low equivalent oxide thickness. In this paper we investigate the S-passivation of the Ge gate stack in which only 1 monolayer of S is needed in order to improve the interface properties of the gate stack. S-passivation is achieved via exposure of the clean Ge(100) surface to H2S. The high-k dielectric is deposited via atomic layer deposition. We show that the oxidant precursor type (H2O versus O3) will result not only in different growth behavior but also in different interface properties. The H2O based process results in low defect densities at the valence bandedge, whereas the O3 based process results in low defect densities at the conduction bandedge.

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Thierry Conard

Katholieke Universiteit Leuven

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Wilfried Vandervorst

Katholieke Universiteit Leuven

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Hugo Bender

Katholieke Universiteit Leuven

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Sven Van Elshocht

Katholieke Universiteit Leuven

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Christoph Adelmann

Katholieke Universiteit Leuven

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Annelies Delabie

Katholieke Universiteit Leuven

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Matty Caymax

Katholieke Universiteit Leuven

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Johan Meersschaut

Katholieke Universiteit Leuven

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Karl Opsomer

Katholieke Universiteit Leuven

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