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Featured researches published by Archana Venugopal.


Journal of Materials Chemistry C | 2015

Low temperature synthesis of graphite on Ni films using inductively coupled plasma enhanced CVD

Lanxia Cheng; Kayoung Yun; Antonio T. Lucero; Jie Huang; Xin Meng; Guoda Lian; Ho Seok Nam; Robert M. Wallace; Moon J. Kim; Archana Venugopal; Luigi Colombo; Jiyoung Kim

Controlled synthesis of graphite at low temperatures is a desirable process for a number of applications. Here, we present a study on the growth of thin graphite films on polycrystalline Ni films at low temperatures, about 380 °C, using inductively coupled plasma enhanced chemical vapor deposition. Raman analysis shows that the grown graphite films are of good quality as determined by a low ID/IG ratio, ∼0.43, for thicknesses ranging from a few layers of graphene to several nanometer thick graphitic films. The growth of graphite films was also studied as a function of time, precursor gas pressure, hydrogen concentration, substrate temperature and plasma power. We found that graphitic films can be synthesized on polycrystalline thin Ni films on SiO2/Si substrates after only 10 seconds at a substrate temperature as low as 200 °C. The amount of hydrogen radicals, adjusted by changing the hydrogen to methane gas ratio and pressure, was found to dramatically affect the quality of graphite films due to their dual role as a catalyst and an etchant. We also find that a plasma power of about 50 W is preferred in order to minimize plasma induced graphite degradation.


international reliability physics symposium | 2013

Sub-threshold current based acceleration and modeling of OFF-state TDDB in drain extended NMOS and PMOS transistors

Dhanoop Varghese; Archana Venugopal; S. Pan; Srikanth Krishnan

It is not always practical to observe OFF-state drain-to-gate dielectric breakdown in power transistors due to the upper limit set to stress voltage by junction breakdown. In this paper we demonstrate that OFF-state breakdown in drain extended power transistors can be accelerated by increasing the channel current (IS) by biasing the transistor in sub-threshold. We also show that the charge pumping scaling factors along with observed breakdown times can be used to build an IS and VDG dependent model to extrapolate failure times at operating bias conditions.


Archive | 2016

Low noise graphene hall sensors, systems and methods of making and using same

Arup Polley; Archana Venugopal; Robert R. Doering; Luigi Colombo


Archive | 2015

Low-Offset Graphene Hall Sensor

Arup Polley; Archana Venugopal; Luigi Colombo; Robert R. Doering


Archive | 2016

INTEGRATION OF BACKSIDE HEAT SPREADER FOR THERMAL MANAGEMENT

Archana Venugopal; Marie Denison; Luigi Colombo; Hiep Nguyen; Darvin R. Edwards


international symposium on power semiconductor devices and ic s | 2018

Impact of self-heating effect in hot carrier injection modeling

Dong Seup Lee; Dhanoop Varghese; Arif Sonnet; Jungwoo Joh; Archana Venugopal; Srikanth Krishnan


Archive | 2018

SEMICONDCTOR DEVICE PACKAGE THERMAL CONDUIT

Archana Venugopal; Benjamin S. Cook; Luigi Colombo; Robert R. Doering


Archive | 2017

Heterostructure interconnects for high frequency applications

Archana Venugopal; Benjamin S. Cook; Luigi Colombo; Robert R. Doering


Archive | 2017

Graphene FET with graphitic interface layer at contacts

Luigi Colombo; Archana Venugopal


Archive | 2017

Fusible Link Cell with Dual Bit Storage

Sunil Kumar Dusa; Richard A. Bailey; Archana Venugopal; John A. Rodriguez; Michael Allen Ball

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