Asad A. Abidi

Direct-conversion radio transceivers for digital communications

Direct-conversion is an alternative wireless receiver architecture to the well-established superheterodyne, particularly for highly integrated, low-power terminals. Its fundamental advantage is that the received signal is amplified and filtered at baseband rather than at some high intermediate frequency. This means lower current drain in the amplifiers and active filters and a simpler task of image-rejection. There is considerable interest to use it in digital cellular telephones and miniature radio messaging systems. This paper briefly covers case studies in the use of direct-conversion receivers and transmitters and summarizes some of the key problems in their implementations. Solutions to these problems arise not only from more appropriate circuit design but also from exploiting system characteristics, such as the modulation format in the system. Baseband digital signal processing must be coupled to the analog front-end to make direct-conversion transceivers a practical reality.

A filtering technique to lower LC oscillator phase noise

Test oscillators are implemented using the noise filtering schemes described: a top-biased and a tail-biased VCO for the 1GHz band, and a tail-biased VCO for the 2.2GHz band. These CMOS circuits are fabricated in the STMicroelectronics BiCMOS 6M process.

Noise in RF-CMOS mixers: a simple physical model

Flicker noise in the mixer of a zero- or low-intermediate frequency (IF) wireless receiver can compromise overall receiver sensitivity. A qualitative physical model has been developed to explain the mechanisms responsible for flicker noise in mixers. The model simply explains how frequency translations take place within a mixer. Although developed to explain flicker noise, the model predicts white noise as well. Simple equations are derived to estimate the flicker and white noise at the output of a switching active mixer. Measurements and simulations validate the accuracy of the predictions, and the dependence of mixer noise on local oscillator (LO) amplitude and other circuit parameters.

A 900 MHz CMOS LC-oscillator with quadrature outputs

The local oscillator (LO) in a wireless transceiver satisfies many exacting requirements. A variable frequency enables a phase-locked loop (PLL) to servo the LO to a stable lower frequency reference, or to correct frequency errors from measurements on the received signal. A low phase noise ensures little interference with nearby channels. A large LO voltage-swing means that it can drive a mixer with greater linearity. Finally, in single-sideband applications, the LO must supply precise quadrature phases. Low phase noise mandates use of a high-Q resonator to tune the LO, although most RF resonators are usually not integrable on ICs. Quadrature outputs are usually derived from RC phase-shift of a single-phase LO output, but this is susceptible to component inaccuracy and loss in LO amplitude. The authors present a 900 MHz oscillator circuit implemented in 1 /spl mu/m CMOS that affords modestly low-phase noise, has variable frequency with large output swing, and provides quadrature-phase outputs from two identical coupled oscillators, connected in such a way that they exert a mutual squelch when their relative phase is not in quadrature. The coupled oscillators synchronize to exactly the same frequency, in spite of mismatches in their resonant circuits.

CMOS mixers and polyphase filters for large image rejection

This paper presents an in-depth treatment of mixers and polyphase filters, and how they are used in rejecting the image in transmitters and receivers. A powerful phasor-based analysis is used to explain all common image-reject topologies and their limitations, and it is shown how this can replace complex trigonometric equations commonly found in the literature. Practical problems in design and layout that limit the performance of image-reject upconversion and downconversion mixers are identified, and solutions are presented or limits explained. This understanding is put to work in a low-IF CMOS wideband, low-IF downconversion circuit, which repeatedly rejects the image by 60 dB over the wide band of 3.5 to 20 MHz without trimming or calibration.

Phase Noise and Jitter in CMOS Ring Oscillators

A simple, physically based analysis illustrate the noise processes in CMOS inverter-based and differential ring oscillators. A time-domain jitter calculation method is used to analyze the effects of white noise, while random VCO modulation most straightforwardly accounts for flicker (1/f) noise. Analysis shows that in differential ring oscillators, white noise in the differential pairs dominates the jitter and phase noise, whereas the phase noise due to flicker noise arises mainly from the tail current control circuit. This is validated by simulation and measurement. Straightforward expressions for period jitter and phase noise enable manual design of a ring oscillator to specifications, and guide the choice between ring and LC oscillator

Physical processes of phase noise in differential LC oscillators

There is an unprecedented interest among circuit designers today to obtain insight into the mechanisms of phase noise in LC oscillators. For only with this insight is it possible to optimize oscillator circuits using low-quality integrated resonators to comply with the exacting phase noise specifications of modern wireless systems. In this paper we concentrate on an understanding of the popular differential LC oscillator. We introduce simple models to capture the nonlinear processes that convert voltage or current thermal noise in resistors or transistors into phase noise in the oscillator. The analysis does not require hypothetical elements, such as limiters or amplitude control loops, to fully explain phase noise. A simple expression at the end accurately specifies thermally induced phase noise, and lends substance to Leesons original hypothesis. Next, the upconversion of flicker noise into phase noise is traced to mechanisms first identified in the 1930s, but apparently since forgotten. Unlike thermally induced phase noise, which appears as phase modulation sidebands, flicker noise is shown to upconvert by bias-dependent frequency modulation. The results are validated against SpectreRF simulations and measurements on two differential CMOS oscillators tuned by resonators with very different Qs.

An 800-MHz–6-GHz Software-Defined Wireless Receiver in 90-nm CMOS

A software-defined radio receiver is designed from a low-power ADC perspective, exploiting programmability of windowed integration sampler and clock-programmable discrete-time analog filters. To cover the major frequency bands in use today, a wideband RF front-end, including the low-noise amplifier (LNA) and a wide tuning-range synthesizer, spanning over 800 MHz to 6 GHz is designed. The wideband LNA provides 18-20 dB of maximum gain and 3-3.5 dB of noise figure over 800 MHz to 6 GHz. A low 1/f noise and high-linearity mixer is designed which utilizes the passive mixer core properties and provides around +70 dBm IIP2 over the bandwidth of operation. The entire receiver circuits are implemented in 90-nm CMOS technology. Programmability of the receiver is tested for GSM and 802.11g standards

A 1 GHz CMOS RF front-end IC for a direct-conversion wireless receiver

An integrated low-noise amplifier and downconversion mixer operating at 1 GHz has been fabricated for the first time in 1 /spl mu/m CMOS. The overall conversion gain is almost 20 dB, the double-sideband noise figure is 3.2 dB, the IIP3 is +8 dBm, and the circuit takes 9 mA from a 3 V supply. Circuit design methods which exploit the features of CMOS well suited to these functions are in large part responsible for this performance. The front-end is also characterized in several other ways relevant to direct-conversion receivers.

The Path to the Software-Defined Radio Receiver

After being the subject of speculation for many years, a software-defined radio receiver concept has emerged that is suitable for mobile handsets. A key step forward is the realization that in mobile handsets, it is enough to receive one channel with any bandwidth, situated in any band. Thus, the front-end can be tuned electronically. Taking a cue from a digital front-end, the receivers flexible analog baseband samples the channel of interest at zero IF, and is followed by clock-programmable downsampling with embedded filtering. This gives a tunable selectivity that exceeds that of an RF prefilter, and a conversion rate that is low enough for A/D conversion at only milliwatts. The front-end consists of a wideband low noise amplifier and a mixer tunable by a wideband LO. A 90-nm CMOS prototype tunes 200 kHz to 20-MHz-wide channels located anywhere from 800 MHz to 6 GHz