Been-Yih Jin

Nonplanar device with stress incorporation layer and method of fabrication

CMOS devices with a single work function gate electrode and method of fabrication

Non-planar MOS structure with a strained channel region

Two-dimensional condensation for uniaxially strained semiconductor fins

Tri-gate transistors and methods to fabricate same

Abrupt junction formation by atomic layer epitaxy of in situ delta doped dopant diffusion barriers

Non-planar pMOS structure with a strained channel region and an integrated strained CMOS flow

Transistor gate electrode having conductor material layer

Tri-gate patterning using dual layer gate stack

Thermally stable crystalline defect-free germanium bonded to silicon and silicon dioxide