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Been-Yih Jin

Intel

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Publication

Featured researches published by Been-Yih Jin.

Archive | 2003

Nonplanar device with stress incorporation layer and method of fabrication

Scott Hareland; Robert S. Chau; Brian S. Doyle; Suman Datta; Been-Yih Jin

Archive | 2011

CMOS devices with a single work function gate electrode and method of fabrication

Brian S. Doyle; Been-Yih Jin; Jack T. Kavalieros; Suman Datta; Justin K. Brask; Robert S. Chau

Archive | 2006

Non-planar MOS structure with a strained channel region

Brian S. Doyle; Suman Datta; Been-Yih Jin; Robert S. Chau

Archive | 2012

Two-dimensional condensation for uniaxially strained semiconductor fins

Jack T. Kavalieros; Nancy M. Zelick; Been-Yih Jin; Markus Kuhn; Stephen M. Cea

Archive | 2004

Tri-gate transistors and methods to fabricate same

Robert S. Chau; Suman Datta; Brian S. Doyle; Been-Yih Jin

Archive | 2005

Abrupt junction formation by atomic layer epitaxy of in situ delta doped dopant diffusion barriers

Been-Yih Jin; Brian S. Doyle; Robert S. Chau; Jack T. Kavalieros

Archive | 2004

Non-planar pMOS structure with a strained channel region and an integrated strained CMOS flow

Brian S. Doyle; Suman Datta; Been-Yih Jin; Nancy M. Zelick; Robert S. Chau

Archive | 2003

Transistor gate electrode having conductor material layer

Anand S. Murthy; Boyan Boyanov; Suman Datta; Brian S. Doyle; Been-Yih Jin; Shaofeng Yu; Robert S. Chau

Archive | 2007

Tri-gate patterning using dual layer gate stack

Uday Shah; Brian S. Doyle; Jack T. Kavalieros; Been-Yih Jin

Archive | 2002

Thermally stable crystalline defect-free germanium bonded to silicon and silicon dioxide

Mohamad A. Shaheen; Been-Yih Jin; Robert S. Chau

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Collaboration

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Robert S. Chau

Intel

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Brian S. Doyle

Intel

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Suman Datta

University of Notre Dame

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Jack T. Kavalieros

Intel

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Matthew V. Metz

Northwestern University

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Ravi Pillarisetty

Intel

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Uday Shah

Intel

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Justin K. Brask

Intel

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Marko Radosavljevic

Intel

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Benjamin Chu-Kung

Intel

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