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Dive into the research topics where Chain-Ming Lee is active.

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Featured researches published by Chain-Ming Lee.


international symposium on vlsi technology, systems, and applications | 2007

Low Programming Current Phase Change Memory Cell with Double GST Thermally Confined Structure

Der-Sheng Chao; Hong-Hui Hsu; Ming-Jung Chen; Yi-Chan Chen; Fred Chen; Chain-Ming Lee; Philip H. Yen; Chih-Wei Chen; Wen-Han Wang; Wei-Su Chen; Chenhsin Lien; Ming-Jer Kao; Ming-Jinn Tsai

A novel PCM cell with double GST thermally confined structure was proposed and fabricated in this work. by inserting an extra bottom GST layer under the confined GST region, the heat loss can be effectively prevented and the temperature profile over active region becomes more uniform. thus, a low reset current less than 0.3 ma can be achieved and the set performance is also improved to be faster than 200 ns.


Applied Physics Letters | 2008

Impact of incomplete set programing on the performance of phase change memory cell

Der-Sheng Chao; Chenhsin Lien; Chain-Ming Lee; Yi-Chan Chen; Jyi-Tyan Yeh; Fred Chen; Ming-Jung Chen; Philip H. Yen; Ming-Jer Kao; Ming-Jinn Tsai

Phase change memory (PCM) cells with T-shaped structure using tungsten heater were fabricated and the cell characteristics concerning the programing pulse width were also investigated in this work. The numerical modeling shows the thermal nonuniformity over the active region due to the considerable thermal sink of tungsten heater results in the amorphous-phase residues and the incomplete set programing. The experimental results reveal the existence of residual amorphous phase and indicate that the incomplete set programing is the dominant factor to degrade the PCM cell performances, such as the sensing margin and the endurance. The strategies to eliminate the incomplete set programing are the optimization in programing pulse width and the replacement of the tungsten heater with higher resistivity metal such as TiAlN.


IEEE Electron Device Letters | 2007

Enhanced Thermal Efficiency in Phase-Change Memory Cell by Double GST Thermally Confined Structure

Der-Sheng Chao; Yi-Chan Chen; Fred Chen; Ming-Jung Chen; Philip H. Yen; Chain-Ming Lee; Wei-Su Chen; Chenhsin Lien; Ming-Jer Kao; Ming-Jinn Tsai

A novel phase-change memory cell with a double- confinement structure was proposed and fabricated in this work. By having an additional bottom Ge2Sb2Te5 layer under the electrically confined active region, the heat loss can be effectively prevented. The temperature uniformity over the active region significantly improves and so does the thermal efficiency. Therefore, a low IRESET of about 0.3 mA and a reset power can be achieved. For the SET performance, a pulsewidth as low as 200 ns can be used without compromising the RSET.


international symposium on vlsi technology, systems, and applications | 2007

Performances of GeSnSbTe Material for High-Speed Phase Change Memory

Chain-Ming Lee; Der-Sheng Chao; Yi-Chan Chen; Ming-Jung Chen; Philip H. Yen; Chih-Wei Chen; Hong-Hui Hsu; Wen-Han Wang; Wei-Su Chen; Fred Chen; Tsai-Chu Hsiao; Ming-Jer Kao; Ming-Jinn Tsai

In this paper, a new application of phase change material GeSnSbTe (GSST) is proposed for high-speed phase-change memory (PCM). The device characteristics of PCM employing GeSnSbTe and conventional Ge2Sb2Te5 (GST) are compared. Because of high crystallization speed, the GSST device demonstrates the benefits of shorter SET pulse, lower SET current, and higher resistance ratio.


international symposium on vlsi technology, systems, and applications | 2009

Multi-level phase change memory using slow-quench operation: GST vs. GSST

Der-Sheng Chao; Frederick T. Chen; Yen-Ya Hsu; Wen-Hsing Liu; Chain-Ming Lee; Chih-Wei Chen; Wei-Su Chen; Ming-Jer Kao; Ming-Jinn Tsai

In this paper, we demonstrate the use of a slow-quench waveform for multi-level phase change memory operation and compare the use of Ge<inf>21</inf>Sn<inf>10</inf>Sb<inf>15</inf>Te<inf>54</inf> (GSST) and Ge<inf>2</inf>Sb<inf>2</inf>Te<inf>5</inf> (GST). A faster multilevel operation is possible with the use of GSST, owing to its faster crystallization speed


non-volatile memory technology symposium | 2006

Snapback by Hot Filament

Jyi-Tyan Yeh; Fred Chen; Der-Sheng Chao; Wen-Han Wang; Yi-Chan Chen; Chain-Ming Lee; Ming-Jinn Tsai; Ming-Jer Kao

A simulation procedure using the conventional thermal-electric finite element method for the phase change memory has been developed. By introducing a defect on the amorphous chalcogenide of a reset phase change memory, the snapback by hot filament due to thermal runaway has been investigated by the numerical simulations with three-dimensional model.


international symposium on vlsi technology, systems, and applications | 2006

Novel T shape structure PCM and Electrical-Thermal Characteristics

Wen-Han Wang; Der-Sheng Chao; Y. C. Chen; Chain-Ming Lee; Hong-Hui Hsu; Y. Chuo; M. H. Tseng; M. H. Lee; Wei-Su Chen; Ming-Jer Kao; Ming-Jinn Tsai

Novel interfacial layer structure was proposed with adjustable resistance ratio and more uniform data distribution capabilities. The reduction of writing power can also be expected with further optimizing the materials and corresponding thicknesses. The performance will be even better with the shrinking of contact area


international symposium on vlsi technology, systems, and applications | 2008

RESET-Enhancing Features for Via-Heated Phase-Change Memory Cells

Frederick T. Chen; J.-T. Yeh; Der-Sheng Chao; Ming-Jung Chen; Philip H. Yen; Chain-Ming Lee; J.-W. Chen; Wei-Su Chen; M. J. Kao; Ming-Jinn Tsai

The various means of improving the performance of phase-change memory cells are reviewed. Simulation predictions are compared with experimental results. Emphasis is placed on RESET current reduction by considering the balance between Joule heating input and heat loss to surroundings. For a given via design rule, the double-confined structure gives the best overall performance to date. We attribute this to the low thermal conductivity of the phase-change material.


non-volatile memory technology symposium | 2007

S-shaped negative differential resistance modeling in electro-thermal simulation of phase-change memory programming

Fred Chen; Der-Sheng Chao; M.-J. Chen; P. Yen; Jyi-Tyan Yeh; Chain-Ming Lee; Wen-Han Wang; Ming-Jer Kao; Ming-Jinn Tsai


international symposium on vlsi technology, systems, and applications | 2008

1T2R Structure with Cross-Spacer for High-Density Phase Change Memory

Chain-Ming Lee; Chih-Wei Chen; Wei-Su Chen; Der-Sheng Chao; Ming-Jung Chen; Philip H. Yen; Fred Chen; Ming-Jer Kao; Ming-Jinn Tsai

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Der-Sheng Chao

National Tsing Hua University

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Ming-Jer Kao

Industrial Technology Research Institute

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Ming-Jinn Tsai

Industrial Technology Research Institute

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Ming-Jung Chen

Industrial Technology Research Institute

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Philip H. Yen

Industrial Technology Research Institute

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Wei-Su Chen

Industrial Technology Research Institute

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Yi-Chan Chen

Industrial Technology Research Institute

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Hong-Hui Hsu

Industrial Technology Research Institute

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Wen-Han Wang

Industrial Technology Research Institute

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Chenhsin Lien

National Tsing Hua University

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