Chang-Ming Hsieh

A field-funneling effect on the collection of alpha-particle-generated carriers in silicon devices

We studied the transient characteristics of charge collection from alpha-particle tracks in silicon devices. We have run computer calculations using the finite element method, in parallel with experimental work. When an alpha particle penetrates a pn-junction, the generated carriers drastically distort the junction field. After the alpha particle penetration, the field, which was originally limited to the depletion region, extends far down into the bulk silicon along the length of the alpha-particle track and funnels a large number of carriers into the struck junction. After a few nanoseconds, the field recovers to its position in the normal depletion layer, and, if the track is long enough, a residue of carriers is left to be transported by diffusion. The extent of this field funneling is a function of substrate concentration, bias voltage, and the alpha-particle energy.

Dynamics of Charge Collection from Alpha-Particle Tracks in Integrated Circuits

We studied the transient characteristics of charge collection from alpha-particle tracks in silicon devices. We have run computer calculations using the finite element method, in parallel with experimental work. When an alpha particle penetrates a pn-junction, the generated carriers drastically distort the junction field. After alpha particle penetration, the field, which was originally limited to the depletion region, extends far down into the bulk silicon along the length of the alpha-particle track and funnels a large number of carriers into the struck junction. After less than one nanosecond, the field recovers to its position in the normal depletion layer, and, if the track is long enough, a residue of carriers is left to be transported by diffusion. The extent of this field funneling is a function of substrate concentration, bias voltage, and the alpha-particle energy.

Floating body effects in partially-depleted SOI CMOS circuits

This paper presents a detailed study on the impact of floating body in partially-depleted (PD) SOI MOSFET on various digital VLSI CMOS circuit families. The parasitic bipolar effect resulting from the floating body is shown to degrade the circuit noise margin and stability in general. In certain dynamic circuits and wide multiplexers, the parasitic bipolar effect is shown to cause logic state error if not properly accounted for.