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Featured researches published by Chih-Ming Lai.


Optical Microlithography XVII | 2004

Phenomena and OPC solution of ripple patterns for 65-nm node

Chih-Ming Lai; Jeng-Shiun Ho; Chien-Wen Lai; Cheng-Kun Tsai; Cherng-Shyan Tsay; Jeng-Horng Chen; Ru-Gun Liu; Yao Ching Ku; Burn-Jeng Lin

The ripple patterns induced by the lithography process will lead to unpredictable necking or bridging risks on circuit patterns. This phenomenon is particularly severe while using the attenuated-phase-shifting mask combined with the strong off-axis illumination. The CD variation induced by the ripple effect is difficult to be accurately corrected by conventional OPC approaches. In this paper, ripples on patterning for the 65nm node have been studied and their problems solved. One of the dominant root causes of ripples is the optical side-lobes from the surrounding patterns. On the L-shape patterns for example, the ripples that occur on the horizontal lines are induced by the side-lobes of the vertical lines. Based on this study of the ripple effect, the layout types resulting in ripple patterns can be classified and predicted. An advanced OPC approach by the segmentation analysis on polygons as well as the correction algorithm optimization has been developed and applied to solve this ripple problem.


Archive | 2007

Method for Detection and Scoring of Hot Spots in a Design Layout

Chih-Ming Lai; Ru-Gun Liu; I-Chang Shin; Yao-Ching Ku; Cliff Hou


Archive | 2009

Routing Method for Double Patterning Design

Yi-Kan Cheng; Lee-Chung Lu; Ru-Gun Liu; Chih-Ming Lai


Archive | 2011

Model import for electronic design automation

Ru-Gun Liu; Chih-Ming Lai; Wen-Chun Huang; Boren Luo; I-Chang Shin; Yao-Ching Ku; Cliff Hou


Archive | 2015

Spacer Etching Process For Integrated Circuit Design

Ru-Gun Liu; Cheng-Hsiung Tsai; Chung-Ju Lee; Chih-Ming Lai; Chia-Ying Lee; Jyu-Horng Shieh; Ken-Hsien Hsieh; Ming-Feng Shieh; Shau-Lin Shue; Shih-Ming Chang; Tien-I Bao; Tsai-Sheng Gau


Archive | 2015

Method of Patterning a Feature of a Semiconductor Device

Yen-Chun Huang; Ming-Feng Shieh; Ken-Hsien Hsieh; Chih-Ming Lai; Ru-Gun Liu; Tsai-Sheng Gau


Archive | 2008

Method for shape and timing equivalent dimension extraction

Ying-Chou Cheng; Chih-Ming Lai; Ru-Gun Liu; Tsong-Hua Ou; Min-Hong Wu; Yih-Yuh Doong; Hsiao-Shu Chao; Yi-Kan Cheng; Yao-Ching Ku; Cliff Hou


Archive | 2008

Electrical Parameter Extraction for Integrated Circuit Design

Tsong-Hua Ou; Ying-Chou Cheng; Chia-Chi Lin; Ru-Gun Liu; Chih-Ming Lai; Min-Hong Wu; Yih-Yuh Doong; Cliff Hou; Yao-Ching Ku


Archive | 2015

METHOD OF PATTERNING FEATURES OF A SEMICONDUCTOR DEVICE

Wei-Chao Chiu; Nian-Fuh Cheng; Chen-Yu Chen; Ming-Feng Shieh; Chih-Ming Lai; Wen-Chun Huang; Ru-Gun Lin


Archive | 2015

FIN PATTERNING METHODS FOR INCREASED PROCESS MARGIN

Chin-Yuan Tseng; Chi-Cheng Hung; Chun-Kuang Chen; Chih-Ming Lai; Huan-Just Lin; Ru-Gun Liu; Tsai-Sheng Gau; Wei-Liang Lin

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