Chung-Ju Lee

Low capacitance approaches for 22nm generation Cu interconnect

Various integration approaches, including homogeneous porous Low-k and air gaps, for low-capacitance solution were investigated for 22nm Cu interconnect technology and beyond. For homogeneous Low-k approach, K=2.0 Low-k material is successfully integrated with Cu. Up to 15% line to line capacitance reduction compared with LK-1 (K= 2.5) was demonstrated by a damage-less etching and CMP process. For air gap approach, a cost-effective and Selective air gaps formation process was developed. Air gaps are selectively formed only at narrow spacing between conduction lines without additional processes.

Challenges of Low Effective-K approaches for future Cu interconnect

Challenges of various Low Effective-K approaches, including homogeneous Low-K and Air-Gap, for next generation Cu/Low-K interconnect will be presented. For homogeneous Low-K approach, top issues and possible solutions for K damage, package, and CMP peeling & plannarization due to introduction of fragile lower k (K≪2.4) insulator will be focused. For Air-Gap, various types of Air-Gaps will be reviewed from the points of cost, layout/designer, and new processes involved.