Concepción Aldea

Cost-Effective 1.25-Gb/s CMOS Receiver for 50-m Large-Core SI-POF Links

This letter proposes a new analog front end for short-reach high-speed optical communications that compensates the limited bandwidth of 1-mm step-index polymer optical fiber (SI-POF) transmission systems. In particular, the front end has been fabricated using a cost-effective digital 0.18- complementary metal-oxide-semiconductor (CMOS) technology and fed with only 1 V. The prototype contains a transimpedance amplifier, a continuous-time equalizer, and an output driver. Experimentally, we have obtained 1.25-Gb/s transmission for a simple nonreturn-to-zero modulation in an optical link composed of 50 m of SI-POF and a large area Si PIN photodetector.

Low-voltage low-power CMOS receiver front-end for gigabit short-reach optical communications

This article presents a new CMOS receiver analog front-end for short-reach high-speed optical communications, which compensates the limited product bandwidth length of 1-mm step-index plastic optical fiber (SI-POF) channels (45 MHz · 100 m) and the required large-diameter high-capacitance Si PIN photodetector (0.8 mm–3 pF). The proposed architecture, formed by a transimpedance amplifier and a continuous-time equalizer, has been designed in a standard 0.18-µm CMOS process with a single supply voltage of only 1 V, targeting gigabit transmission for simple no-return-to-zero modulation consuming less than 23 mW. Experimental results validate the approach for cost-effective gigabit SI-POF transmission. Comparative analysis with previously reported POF receivers has been carried out by introducing a useful figure of merit. Copyright

A design strategy for VHF filters with digital programmability

In this paper we report 2nd and 3rd-order Gm-C filters based on fully-balanced pseudo-differential continuous-time transconductors for applications in low-voltage systems over the VHF range. By using a 0.35 mum standard CMOS process, low-pass filter approximations have been implemented with a cut-off frequency programmability over the 40-200 MHz range, which confirm the feasibility of the proposed strategy in applications such as data storage systems and IF strips. The filters consume less than 4.8 mW per pole at 45 MHz from a 2V supply. The measured dynamic range was better than 53 dB at THD of 1% for all filters. The maximum active chip area is 0.025 mm2 per pole

A Low-Power CMOS Receiver for 1.25 Gb/s Over 1- mm SI-POF Links

This paper presents an optical receiver for short-reach applications through low-cost plastic optical fiber. The limited bandwidth caused by the fiber and the external photodiode is compensated by a new adaptive equalizer based on the spectrum balancing technique. A clock and data recovery circuit is included that minimizes jitter and metastability using a new multilevel bang-bang architecture. The prototype, implemented in a standard 0.18-μm CMOS process, achieves 1.25 Gb/s with a power of 107 mW at only 1 V.

Digitally programmable CMOS transconductor for very high frequency

Abstract This paper describes a new approach for realizing digitally programmable VHF/UHF transconductors compatible with pure digital CMOS technologies. A programmable/tunable transconductor, based on a parallel connection of unit cascode cells, is used to implement a fully balanced current-mode G m – C integrator to operate over the 30–200 MHz range with more than 70 dB of dynamic range for 1% of THD.

1-V continuous-time equalizers for multi-gigabit short-haul optical fiber communications

Two new CMOS analog continuous-time equalizers for high-speed short-haul optical fiber communications are presented in this paper. The proposed structures compensate the limited bandwidth-length product of 1-mm step-index polymer optical fiber channels (45 MHz, 100 m) and have been designed in a standard 0.18-µm CMOS process. The equalizers are aimed for multi-gigabit short-range applications, targeting up to 2 Gb/s through a 50-m step-index polymer optical fiber. The prototypes operate with a single supply voltage of only 1 V and overcome the severe limitations suffered by the widely used degenerated differential pair caused by the low supply voltage. Copyright

A 1-V 1.25-Gbps CMOS analog front-end for short reach optical links

This paper presents a new adaptive equalizer for short reach applications through low-cost plastic optical fiber. The adaptive equalizer uses the spectrum balancing technique to compensate the limited bandwidth caused by the fiber and the external photodiode. The prototype has been implemented in a standard 0.18-μm CMOS process fed at 1 V. It consumes 38.6 mW at 1.25 Gb/s.

A CMOS continuous-time equalizer for short-reach optical communications

This paper presents a new CMOS analog equalizer for short-reach optical communications. The circuit has been designed in a standard 0.18 µm CMOS process. The equalizer is aimed for multi-gigabit short-range applications, targeting up to 3.125 Gbps through a 50 m SI-POF. The proposed structure operates with a supply voltage of 1 V and has a power consumption of 2.5 mW.

Digitally Programmable Analogue Circuits for Sensor Conditioning Systems

This work presents two current-mode integrated circuits designed for sensor signal preprocessing in embedded systems. The proposed circuits have been designed to provide good signal transfer and fulfill their function, while minimizing the load effects due to building complex conditioning architectures. The processing architecture based on the proposed building blocks can be reconfigured through digital programmability. Thus, sensor useful range can be expanded, changes in the sensor operation can be compensated for and furthermore, undesirable effects such as device mismatching and undesired physical magnitudes sensor sensibilities are reduced. The circuits were integrated using a 0.35 μm standard CMOS process. Experimental measurements, load effects and a study of two different tuning strategies are presented. From these results, system performance is tested in an application which entails extending the linear range of a magneto-resistive sensor. Circuit area, average power consumption and programmability features allow these circuits to be included in embedded sensing systems as a part of the analogue conditioning components.

A technique for high frequency low distortion measurements

In this communication a low-cost technique for low distortion measurements at high-frequency is presented. We need to characterize the dynamic range of very low distortion linear integrated circuits over a range of 100 dB at video frequencies (around 10 MHz). Instead of buying costly distortion measuring equipment, we have preferred to build a simple and economical system for this propose.