Craig Riddet

Advanced simulation of statistical variability and reliability in nano CMOS transistors

Increasing CMOS device variability has become one of the most acute problems facing the semiconductor manufacturing and design industries at, and beyond, the 45 nm technology generation. Most problematic of all is the statistical variability introduced by the discreteness of charge and granularity of matter in transistors with features already of molecular dimensions [i]. Two transistors next to each other on the chip with exactly the same geometries and strain distributions may have characteristics from each end of a wide statistical distribution. In conjunction with statistical variability [ii], negative bias temperature instability (NBTI) and/or hot carrier degradation can result in acute statistical reliability problems. It already profoundly affects SRAM design, and in logic circuits causes statistical timing problems and is increasingly leading to hard digital faults. In both cases, statistical variability restricts supply voltage scaling, adding to power dissipation problems [iii]. In this invited paper we describe recent advances in predictive physical simulation of statistical variability using drift diffusion (DD), Monte Carlo (MC) and quantum transport (QT) simulation techniques.

3-D Monte Carlo Simulation of the Impact of Quantum Confinement Scattering on the Magnitude of Current Fluctuations in Double Gate MOSFETs

For the scaling of ultrathin body double gate (UTB DG) MOSFETs to channel lengths below 10 nm, a silicon body thickness of less than 5 nm is required. At these dimensions the influence of atomic scale roughness at the interface between the silicon body and the gate dielectric becomes significant, producing appreciable body thickness fluctuations. These fluctuations result in a scattering potential related to the quantum confinement variation within the channel which, similarly to the interface roughness scattering, influences the mobility, the drive current and the intrinsic parameter variations. In this paper we have developed an ensemble Monte Carlo simulation approach to study the impact of quantum confinement scattering on the transport in sub-10 nm UTB DG MOSFETs, and the corresponding intrinsic parameter variations. By comparing the Monte Carlo simulations with drift-diffusion simulations we quantify the important contribution of the quantum confinement related scattering to the current fluctuations in such devices

Hole Mobility in Germanium as a Function of Substrate and Channel Orientation, Strain, Doping, and Temperature

We present a comprehensive study of hole transport in germanium layers on “virtual” substrates using a full band Monte Carlo simulation approach, considering alternate “virtual” substrate and channel orientations and including the impact of the corresponding biaxial strain, doping, and lattice temperature. The superior mobility in strained germanium channels with orientation on a (110) “virtual” substrate is confirmed, and the factors leading to this enhancement are evaluated. The significant decrease in strain-and-orientation-induced mobility enhancement due to impurity scattering in doped material and at increasing lattice temperature is also demonstrated. Both factors determine how efficiently the mobility enhancement translates into transistor performance enhancement. Additionally, we shine light on the question of which factor has stronger impact in mediating the increase in mobility due to strain-the breaking of degeneracy for the heavy- and light-hole bands at the point or the reduction in the density of states.

Predictive Simulation and Benchmarking of Si and Ge pMOS FinFETs for Future CMOS Technology

In this paper, we study and compare Si versus Ge pMOS FinFETs at advanced node dimensions using ensemble Monte Carlo simulations. It is found that due to large external resistance, lack of stressing methods, smaller bandgap, larger dielectric constant, and increased variability that in the absence of major innovation, Ge is not an ideal candidate for channel replacement material of pMOS in future CMOS technology generation FinFETs. In order for Ge to compete with Si, it would at a minimum require a stressing mechanism and improved contact resistance, but leakage and variability would still be a concern for low-power applications.

Hierarchical Simulation of Statistical Variability: From 3-D MC With “ ab initio” Ionized Impurity Scattering to Statistical Compact Models

Quantum corrections based on density gradient formalism, recently introduced in the 3-D Monte Carlo (MC) module of the Glasgow “atomistic” simulator, are used to simultaneously capture quantum confinement effects as well as “ab initio” ionized impurity scattering. This has allowed us to consistently study the impact of transport variability due to scattering from random discrete dopants on the on-current variability in realistic nano-CMOS transistors. Such simulations result in an increased drain current variability when compared with the drift diffusion (DD) simulation. For the first time, a method that is used to accurately transfer the increased on-current variability obtained from the “ ab initio” MC simulations to the DD simulations is subsequently presented. The MC-corrected DD simulations are used to produce the target I-V characteristics from which the statistical compact models are extracted for use in preliminary design kits at the early stage of new technology development.

Simulation Study of the Impact of Quantum Confinement on the Electrostatically Driven Performance of n-type Nanowire Transistors

In this paper, we have studied the impact of quantum confinement on the performance of n-type silicon nanowire transistors (NWTs) for application in advanced CMOS technologies. The 3-D drift-diffusion simulations based on the density gradient approach that has been calibrated with respect to the solution of the Schrödinger equation in 2-D cross sections along the direction of the transport are presented. The simulated NWTs have cross sections and dimensional characteristics representative of the transistors expected at a 7-nm CMOS technology. Different gate lengths, cross-sectional shapes, spacer thicknesses, and doping steepness were considered. We have studied the impact of the quantum corrections on the gate capacitance, mobile charge in the channel, drain-induced barrier lowering, and subthreshold slope. The mobile charge to gate capacitance ratio, which is an indicator of the intrinsic speed of the NWTs, is also investigated. We have also estimated the optimal gate length for different NWT design conditions.

Simulation of “Ab Initio” Quantum Confinement Scattering in UTB MOSFETs Using Three-Dimensional Ensemble Monte Carlo

In this paper, we report a 3-D Monte Carlo (MC) simulation methodology that includes complex quantum confinement effects captured through the introduction of robust and efficient density gradient (DG) quantum corrections (QCs), which has been used to introduce “ab initio ” scattering from quantum confinement fluctuations in ultrathin body silicon-on-insulator metal-oxide-semiconductor field-effect transistors (MOSFETs) through the real space trajectories of the particles driven by the DG effective quantum potential and to study the enhanced current variability due to the corresponding transport variations. A “frozen field” approximation, where neither the field nor the QCs are updated, has been used to examine the dependence of mobility on silicon thickness in large self-averaging devices. This approximation, along with the MC simulations that are self-consistent with Poissons equation, is applied to study the variability of on-current due to random body thickness fluctuations in thin-body MOSFETs at low and high drain biases.

Monte Carlo simulation study of the impact of strain and substrate orientation on hole mobility in Germanium

The use of alternative channel materials to maintain device performance with scaling for CMOS technology is an active area of research, with Germanium offering an extremely attractive possibility for pMOSFETs in CMOS. In this paper we use full band Monte Carlo transport simulations to investigate the impact of substrate orientation and biaxial strain on hole mobility in bulk Germanium helping to establish a preferential substrate channel orientation that can maximize carrier mobility for these devices.

Simulation of hole-mobility in doped relaxed and strained Ge layers

As silicon based metal-oxide-semiconductor field-effect transistors (MOSFETs) are reaching the limits of their performance with scaling, alternative channel materials are being considered to maintain performance in future complementary metal-oxide semiconductor technology generations. Thus there is renewed interest in employing Ge as a channel material in p-MOSFETs, due to the significant improvement in hole mobility as compared to Si. Here we employ full-band Monte Carlo to study hole transport properties in Ge. We present mobility and velocity-field characteristics for different transport directions in p-doped relaxed and strained Ge layers. The simulations are based on a method for over-coming the potentially large dynamic range of scattering rates, which results from the long-range nature of the unscreened Coulombic interaction. Our model for ionized impurity scattering includes the affects of dynamic Lindhard screening, coupled with phase-shift, and multi-ion corrections along with plasmon scattering...

Circuit design perspectives for Ge FinFET at 10nm and beyond

In this paper we study the circuit design implications of Ge vs. Si PMOS FinFETs at the 10 and 7nm nodes, using TCAD calibrated statistical compact models and the ARM predictive benchmarking flow. The ARM predictive flow incorporates advanced-node-relevant layouts, design rules, parasitic RC extraction and wire-loading. We present the first comprehensive simulation study evaluating Ge pFinFETs in a realistic circuit design context and show that the lack of a stressing mechanism, higher leakage and variability results in sub-optimal performance compared to Si in all circuit benchmark metrics.