KahHou Chan

Hole Mobility in Germanium as a Function of Substrate and Channel Orientation, Strain, Doping, and Temperature

We present a comprehensive study of hole transport in germanium layers on “virtual” substrates using a full band Monte Carlo simulation approach, considering alternate “virtual” substrate and channel orientations and including the impact of the corresponding biaxial strain, doping, and lattice temperature. The superior mobility in strained germanium channels with orientation on a (110) “virtual” substrate is confirmed, and the factors leading to this enhancement are evaluated. The significant decrease in strain-and-orientation-induced mobility enhancement due to impurity scattering in doped material and at increasing lattice temperature is also demonstrated. Both factors determine how efficiently the mobility enhancement translates into transistor performance enhancement. Additionally, we shine light on the question of which factor has stronger impact in mediating the increase in mobility due to strain-the breaking of degeneracy for the heavy- and light-hole bands at the point or the reduction in the density of states.

Monte Carlo simulation study of the impact of strain and substrate orientation on hole mobility in Germanium

The use of alternative channel materials to maintain device performance with scaling for CMOS technology is an active area of research, with Germanium offering an extremely attractive possibility for pMOSFETs in CMOS. In this paper we use full band Monte Carlo transport simulations to investigate the impact of substrate orientation and biaxial strain on hole mobility in bulk Germanium helping to establish a preferential substrate channel orientation that can maximize carrier mobility for these devices.

Monte Carlo simulation study of hole mobility in germanium MOS inversion layers

In this paper transport in the inversion layer of a Ge channel pMOS structure is studied using a full 6-band k·p Monte Carlo simulator. In addition to the usual bulk-scattering mechanisms, which are calibrated and validated against the available experimental data, effects of the gate stack are included via SO phonons and surface roughness scattering. Through careful calibration and consideration of these mechanisms, good qualitative and quantitative agreement is achieved with experimental data.

Monte Carlo simulation of a 20 nm gate length implant free quantum well Ge pMOSFET with different lateral spacer width

The use of high mobility channel materials such as Germanium can increase the pMOSFET drive current, thus improving the switching speed of CMOS. In this study the impact of the lateral spacer thickness on the performance of a 20 nm gate-length implant-free quantum well (IFQW) Ge pMOSFET is investigated using comprehensive full-band Monte Carlo simulations. The results of these simulations show that the narrowing of the spacer from 5 nm down to 1 nm leads to a possible ∼ 2.5× increase in drive current.