Franklin M. Schellenberg

Resolution enhancement technology: the past, the present, and extensions for the future

Definitions and criteria for “resolution” and “resolution enhancement” are discussed, and the primary resolution enhancement techniques (RETs) of OPC, PSM and OAI are categorized according to their control of the fundamental properties of a wave: amplitude, phase, and direction. The history of the invention and development of each of these techniques is then reviewed. Modern RETs are generally combinations of these primary RETs, leading to increased complexity in RET recipes. CAD tools have evolved to cope with this increased complexity. Although these existing RET solutions may allow optical lithography be extended as far as the 32nm IC node, even more capability may be developed if the fourth variable of an electromagnetic wave, polarization, can be exploited as an additional primary RET as well.

Integration of optical proximity correction strategies in strong phase shifters design for poly-gate layers

In this paper we discuss some of the problems and solutions discovered when implementing 2-mask strong phase shifter designs for the poly gate level in logic designs. Experimental results are presented showing pattern fidelity for different reticle designs. Simulations are presented indicating the improvement in pattern fidelity that can be expected from using OPC. Simulations, PSM assignment and model-based OPC correction are performed by the Calibre WORKbench, Calibre DRC, Calibre PSMgate and Calibre OPCpro tools from Mentor Graphics. In conclusion, we show that while fairly simple designs can be used to achieve 250 nm design rules (approximately 150 nm gates), in order to achieve both pattern fidelity as well as small feature size it is necessary to use 3-layer/phase-aware model-based OPC to correct for pattern distortion for design rules of 180 nm and below (approximately 100 nm phase-shifted gates).

Phase aware proximity correction for advanced masks

In this paper we describe the use of sparse aerial image simulation coupled with process simulation, using the variable threshold resist (VTR) model, to do optical and process proximity correction (OPC) on phase shift masks (PSM). We will describe the OPC of PSM, including attenuated PSM, clear field PSM, and double exposure PSM. We will explain the method used to perform such OPC and show examples of critical dimension control improvements generated from such a technique. Simulations, PSM assignment and model based OPC corrections are performed with Calibre Workbench, Calibre DRC, Calibre PSMgate and Calibre OPCpro tools from Mentor Graphics. In conclusion we will show that PSM techniques need to be corrected by a phase aware proximity correction tool in order to achieve both pattern fidelity as well as small feature size on the wafer in a production environment.

Model-assisted double dipole decomposition

Double dipole processes in general have been considered for full Manhattan design styles. However, with the assistance of current model-based OPC tools and high-resolution optical systems, it is possible to analyze the requirements for all angle designs. When angled features present in the design layout are located in regions where only connectivity and not CD control is critical, the method generates an acceptable solution for a given set of optical conditions. The present methodology investigates the use of selective edge biases for clear-field double dipole decomposition. Such an approach is based on the double exposure nature of the method. In full Manhattan designs, two different contrast values are associated to every edge, and in general one is higher than the other. On the contrary, angled edges may have the same contrast depending on the shape of the pupil and local proximity environment. This method maximizes the overall contrast of the layout by creating selective feature biases. These biases are placed in the non-optimal optical direction and protect the regions that have a higher contrast in the complementary dipole direction. The initial decomposition generates two masks in which a maximum global contrast function is maximized. This initial decomposition is later fed to a two-layer model based correction. The final result is analyzed in terms of contrast, pattern fidelity and focus dependence in order to determine the feasibility of printing Manhattan and angled features using a double dipole approach for sub 100 nm processes.

Layout compensation for EUV flare

Flare has been noted as a significant concern for Extreme Ultraviolet (EUV) Lithography. Recent results on prototype tools have shown flare on the order of 40% in extreme cases. This is far from the ideal result. Flare compensation for EDA software tools such as Mentor Graphics’ Calibre RET Suite has been developed, and can be used to compensate density dependent fluctuations in conventional DUV lithography. This can be as simple as making corrections using rules for the variations of isolated and dense lines in an environment with prescribed flare, or a more complex correction incorporating flare into model-based OPC. Flare in EUV systems, however, has been shown to be non-uniform, with complex variations. In this presentation, we describe this flare correction technique and explore the correction of typical IC layouts that would be required to compensate for reported EUV flare values.

Design verification flow for model-assisted double-dipole decomposition

Double-exposure techniques are currently being explored as alternatives to the low k1 problem that arises form the current absence of next-generation lithography (NGL) tools. Off-axis illumination conditions such as annular, used in conjunction with binary chrome masks are able to resolve features as small as 100nm. However, these off-axis approaches only improve a limited set of pitches. While certain features on the layout are enhanced, others loose contrast and cannot be imaged properly. Dipole illumination is the extreme off-axis case, but this high/low contrast problem is lessened by a double exposure approach. Double exposure corrections require a global optimization of tow masks. As is the case with any multi-dimensional problem, current model OPC algorithms are able to locally optimize the solution, but it is difficult to guarantee a global optimal set. Including in the correction mask-manufacturing constraints can reduce this apparent problem. By limiting the number of local optimal states accessible to the convergence criterion, it is possible to arrive at a better solution. This solution is lithographically correct and easier to manufacture. In this work we preset a data flow using models created previously for a model-assisted dipole decomposition to rank different approaches based on final image contrast, pattern fidelity and focus dependency. We also provide insights on how angled features can be successfully imaged under a double dipole approach, showing how such features need to be studied form an image formation point of view, not under simple geometric principles that rule out the presence of angled features.

Impact of RET on physical layouts

In this paper, we briefly describe the lithography developments known as RET (Resolution Enhancement Technologies), which include off-axis illumination in litho tools, Optical and Process Correction (OPC), and phase shifting masks (PSM). All of these techniques are adopted to allow ever smaller features to be reliably manufactured, and are being generally adopted in all manufacturing below 0.25 microns. However, their adoption also places certain restrictions on layouts. We explore these restrictions, and then provide suggestions for layout practices that will facilitate the use of these technologies, especially the generation of a clean target layout for use as input layers for photomask preparation, and the use of verification tools that use process simulation.

Impact of mask errors on full chip error budgets

As lithography pushes to smaller and smaller features under the guidance of Moores Law, patterned features smaller than the wavelength of light must be routinely manufactured. Lithographic yield in this domain is directly improved with the application of OPC to the pattern data. However, such corrections generally assume that the reticle can reproduce the benefits of OPC in some circumstances. In this paper, we present the characterization of the MEEF for contact holes. These are found to have significantly higher values for the MEEF than typically measured for isolated lines. Theoretical predictions are compared with experimental results. Good agreement is found at the center of the field only when the actual area of the contact hole as formed on the reticle is used as the metric of contact size. Across field variation, however, is found to be significant requires characterization for optimum yield to be achieved.

The next generation of RET

Resolution Enhancement Techniques (RET) in lithography have enabled optical lithography to reliably produce IC features 2 or even 3 times smaller than the optical wavelength used for imaging. At this point, even the dimensions required for the 32nm node appear to be in reach using 193nm photons, provided hyper-NA lenses and extreme RET solutions are also adopted. In this paper, the development of RET over the past century is briefly reviewed, to better understand how we made it so far using what we have. Current trends for some of the most recent developments in implementing the 65nm IC node are presented. These include novel illumination source optimization algorithms and polarization considerations. This is followed by a general consideration of whether lessons learned from these applications can be applied to other situations currently described as Design for Manufacturing (DFM) technologies. Consideration will also be given to the extension to DFM for other photonic structures, such as photonic crystal switching devices.

Contrast analysis and optimization for resolution enhancement technique

We propose a framework for the analysis and characterization of the efficacy of any resolution enhancement technique (RET) in lithography. The method is based on extracting a distribution of the image log slope (ILS) for a given layout under a predefined set of optical conditions. This distribution is then taken as the optical signature for the image local contrast of the design. The optical signature can be created for an entire layout, or only for certain cells believed to be problematic. Comparisons can be made between the optical signatures generated using different illumination/RET strategies. We have used this method to evaluate and optimize two different RET approaches: subresolution assist features (SRAF) and double-exposure dipole illumination.