Frederick T. Chen

Metal–Oxide RRAM

In this paper, recent progress of binary metal-oxide resistive switching random access memory (RRAM) is reviewed. The physical mechanism, material properties, and electrical characteristics of a variety of binary metal-oxide RRAM are discussed, with a focus on the use of RRAM for nonvolatile memory application. A review of recent development of large-scale RRAM arrays is given. Issues such as uniformity, endurance, retention, multibit operation, and scaling trends are discussed.

Low power and high speed bipolar switching with a thin reactive Ti buffer layer in robust HfO2 based RRAM

A novel HfO2-based resistive memory with the TiN electrodes is proposed and fully integrated with 0.18 mum CMOS technology. By using a thin Ti layer as the reactive buffer layer into the anodic side of capacitor-like memory cell, excellent memory performances, such as low operation current (down to 25 muA), high on/off resistance ratio (above 1,000), fast switching speed (5 ns), satisfactory switching endurance (>106 cycles), and reliable data retention (10 years extrapolation at 200degC) have been demonstrated in our memory device. Moreover, the benefits of high yield, robust memory performance at high temperature (200degC), excellent scalability, and multi-level operation promise its application in the next generation nonvolatile memory.

Unipolar resistive switching characteristics of ZnO thin films for nonvolatile memory applications

Highly (002)-oriented and columnar-grained ZnO thin films were prepared by radio frequency magnetron sputtering at room temperature. The Pt∕ZnO∕Pt devices exhibit reversible and steady bistable resistance switching behaviors with a narrow dispersion of the resistance states and switching voltage. Only a low forming electric field was required to induce the resistive switching characteristics. The resistance ratios of high resistance state to low resistance state were in the range of 3–4 orders of magnitude within 100cycles of test. It was also found that the conduction mechanisms dominating the low and high resistance states are Ohmic behavior and Poole-Frenkel emission, respectively.

Highly scalable hafnium oxide memory with improvements of resistive distribution and read disturb immunity

A 30×30 nm2 HfOx resistance random access memory (RRAM) with excellent electrical performances is demonstrated for the scaling feasibility in this work. A 1 Kb one transistor and one resistor (1T1R) array with robust characteristics was also fabricated successfully. The device yield of the 1 Kb array is 100%, and the endurance for these devices can exceed 106 cycles by a pulse width of 40 ns. Two effective verification methods, which make a tight distribution of high resistance (RHIGH) and low resistance (RLOW) are proposed for the array to ensure a good operation window. A thin AlOx buffer layer under the HfOx layer was adopted to enhance the read disturb immunity. Without large parasitic capacitance, the 1T1R RRAM devices exhibit excellent program(PGM)/erase(ERS) disturb immunity.

A 4Mb embedded SLC resistive-RAM macro with 7.2ns read-write random-access time and 160ns MLC-access capability

Several emerging nonvolatile memories (NVMs) including phase-change RAM (PCRAM) [1–3], MRAM [4–5], and resistive RAM (RRAM) [6–8] have achieved faster operating speeds than embedded Flash. Among those emerging NVMs, RRAM has advantages in faster write time, a larger resistance-ratio (R-ratio), and smaller write power consumption. However, RRAM cells have large cross-die and within-die resistance variations (R-variations) and require low read-mode bitline (BL) bias voltage (VBL-R) to prevent read disturbance. This work proposes process/resistance variation-insensitive read schemes for embedded RRAM to achieve fast read speeds with high yields. An embedded mega-bit scale (4Mb), single-level-cell (SLC) RRAM macro with sub-8ns read-write random-access time is presented. Multi-level-cell (MLC) operation with 160ns write-ver-ify operation is demonstrated.

Evidence and solution of over-RESET problem for HfO X based resistive memory with sub-ns switching speed and high endurance

The memory performances of the HfOX based bipolar resistive memory, including switching speed and memory reliability, are greatly improved in this work. Record high switching speed down to 300 ps is achieved. The cycling test shed a clear light on the wearing behavior of resistance states, and the correlation between over-RESET phenomenon and the worn low resistance state in the devices is discussed. The modified bottom electrode is proposed for the memory device to maintain the memory window and to endure resistive switching up to 1010 cycles.

Low-Power and Nanosecond Switching in Robust Hafnium Oxide Resistive Memory With a Thin Ti Cap

The memory performance of hafnium oxide (HfOx)-based resistive memory containing a thin reactive Ti buffer layer can be greatly improved. Due to the excellent ability of Ti to absorb oxygen atoms from the HfOx film after post-metal annealing, a large amount of oxygen vacancies are left in the HfOx layer of the TiN/Ti/HfOx/TiN stacked layer. These oxygen vacancies are crucial to make a memory device with a stable bipolar resistive switching behavior. Aside from the benefits of low operation power and large on/off ratio (>100), this memory also exhibits reliable switching endurance (>106 cycles), robust resistance states (200°C), high device yield (~100%), and fast switching speed (<10 ns).

Improvement of resistive switching characteristics in TiO2 thin films with embedded Pt nanocrystals

We have fabricated TiO 2 thin films with embedded Pt nanocrystals (Pt-NCs) and investigated the resistive switching characteristics for nonvolatile memory application. Reversible and steady bistable resistance switching behavior was observed for the Pt / TiO 2 / Pt capacitors with Pt-NCs embedded in the TiO 2 films. Moreover, an improvement in the stability of resistance switching and retention properties was also achieved from the embedding of uniform and fine Pt-NCs.

An Ultrathin Forming-Free

Abstract-A forming-free 3-nm-thick HfOx, resistive memory device is demonstrated. The percolation threshold of insulatingto-conductive transition in the ultrathin HfOx, can be lowered by using the Ti capping layer with an adequate post metal annealing. By the reaction between Ti and HfOx,, oxygen ions are depleted from the oxide, and conductive percolative paths, which consist of charged oxygen vacancies, are formed. Without any forming step, the memory can operate with stable bipolar resistance switching by initial positive or negative voltage sweep. Possible scenarios of switching mechanism for the initial state of the device with different sweep directions are proposed. This forming-free device also exhibits an on/off ratio of about ten and excellent memory performances, including high speed (~10 ns), low operation voltages (<; 1.2 V), robust endurance (> 106 cycles), good nonvolatile property (500 min at 85 °C), and 2-b switching per cell.

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This work demonstrates the first fabricated macro-level RRAM-based nonvolatile SRAM (nvSRAM) that use a new 8T2R (Rnv8T) cell to achieve fast NVM storage and low VDDmin read/write operations. The Rnv8T cell uses two fast-write low-current RRAM devices, 3D stacked over the 8T, to achieve low store energy with a compact cell area (1.6x that of a 6T cell). A 2T RRAM-switch provides both RRAM control and write-assist functions. This write assist feature enables Rnv8T cell to use read favored transistor sizing against read/write failure at a lower VDD. The fabricated 16Kb Rnv8T macro achieves the lowest store energy and R/W VDDmin (0.45V) than other nvSRAM and “SRAM+NVM” solutions.