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Giuseppe Curello

Intel

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Publication

Featured researches published by Giuseppe Curello.

Archive | 2005

Device with stepped source/drain region profile

Giuseppe Curello; Bernhard Sell; Sunit Tyagi; Chris Portland Auth

Archive | 2005

Isolation body for semiconductor devices and method to form the same

Giuseppe Curello; Mark Bohr; H. Deshpande; Sunit Tyagi

Archive | 2006

Strained silicon MOS device with box layer between the source and drain regions

Giuseppe Curello; H. Deshpande; Sunit Tyagi; Mark Bohr

Archive | 2004

Short channel effect of MOS devices by retrograde well engineering using tilted dopant implantation into recessed source/drain regions

Thomas Hoffmann; Sunit Tyagi; Giuseppe Curello; Bernhard Sell; Christopher Auth

Archive | 2003

High concentration indium fluorine retrograde wells

Cory E. Weber; Mark Armstrong; Stephen M. Cea; Giuseppe Curello; Sing-Chung Hu; Aaron D. Lilak; Max Wei

Archive | 2006

Enhancing strained device performance by use of multi narrow section layout

Giuseppe Curello; Thomas Hoffmann; Mark Armstrong

Archive | 2013

Penetrating implant for forming a semiconductor device

Giuseppe Curello; Ian R. Post; Nick Lindert; Walid M. Hafez; Chia-Hong Jan; Mark Bohr

Archive | 2011

Selective spacer formation on transistors of different classes on the same device

Giuseppe Curello; Ian R. Post; Chia-Hong Jan; Mark Bohr

Archive | 2005

Active region spacer for semiconductor devices and method to form the same

Giuseppe Curello; Ian R. Post; Chia-Hong Jan; Sunit Tyagi; Mark Bohr

Archive | 2005

Method of fabricating a MOSFET transistor having an anti-halo for modifying narrow width device performance

Giuseppe Curello; Sivakumar Mudanai; Nick Lindert; Leonard C. Pipes; M. Shaheed; Sunit Tyagi

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Sunit Tyagi

Intel

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Mark Bohr

Intel

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H. Deshpande

Intel

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Nick Lindert

Intel

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Walid M. Hafez

Intel

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Chia-Hong Jan

Intel

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Ian R. Post

Intel

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Thomas Hoffmann

Intel

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Bernhard Sell

Intel

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Mark Armstrong

Intel

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