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Dive into the research topics where H.S. Jeong is active.

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Featured researches published by H.S. Jeong.


international electron devices meeting | 2004

Highly manufacturable high density phase change memory of 64Mb and beyond

Seung-Eon Ahn; Y.J. Song; C.W. Jeong; J.M. Shin; Y. Fai; Y.N. Hwang; S.H. Lee; K.C. Ryoo; S.Y. Lee; J.H. Park; Hideki Horii; Y.H. Ha; J.H. Yi; B.J. Kuh; Gwan-Hyeob Koh; G.T. Jeong; H.S. Jeong; Kinam Kim; Byung-Il Ryu

Highly manufacturable 64Mbit PRAM has been successfully fabricated using N-doped Ge/sub 2/Sb/sub 2/Te/sub 5/ (GST) and optimal GST etching process. Using those technologies, it was possible to achieve the low writing current of 0.6 mA and clear separation between SET and RESET resistance distributions. The 64Mb PRAM was designed to support commercial NOR flash memory compatible interfaces. Therefore, the fabricated chip was tested under the mobile application platform and its functionality and reliability has been evaluated by operation temperature dependency, disturbance, endurance, and retention. Finally, it was clearly demonstrated that high density PRAM can be fabricated in the product level with strong reliability to produce new nonvolatile memory markets.


symposium on vlsi technology | 2003

Full integration and reliability evaluation of phase-change RAM based on 0.24 /spl mu/m-CMOS technologies

Y.N. Hwang; J.S. Hong; S.H. Lee; Seung-Eon Ahn; G.T. Jeong; Gwan-Hyeob Koh; Jae-joon Oh; H.J. Kim; Won-Cheol Jeong; S.Y. Lee; J.H. Park; K.C. Ryoo; Hideki Horii; Y.H. Ha; J.H. Yi; Woo Yeong Cho; Y.T. Kim; K.H. Lee; Suk-ho Joo; S.O. Park; U-In Chung; H.S. Jeong; Kinam Kim

We have fully integrated a nonvolatile random access memory by successfully incorporating a reversibly phase-changeable chalcogenide memory element with MOS transistor. As well as basic characteristics of the memory operation, we have also observed reliable performances of the device on hot temperature operation, endurance against repetitive phase transition, writing imprint, reading disturbance and data retention.


international electron devices meeting | 2006

Full Integration of Highly Manufacturable 512Mb PRAM based on 90nm Technology

Jae-joon Oh; J.H. Park; Y.S. Lim; Hyuck Lim; Y.T. Oh; Ju-Hyung Kim; J.M. Shin; Y.J. Song; K.C. Ryoo; Dong-won Lim; Soonoh Park; Jin-hak Kim; Jung-hyeon Kim; J. Yu; F. Yeung; C.W. Jeong; J.H. Kong; Donghun Kang; Gwan-Hyeob Koh; G.T. Jeong; H.S. Jeong; Kinam Kim

Fully functional 512Mb PRAM with 0.047mum2 (5.8F2) cell size was successfully fabricated using 90nm diode technology in which the authors developed novel process schemes such as vertical diode as cell switch, self-aligned bottom electrode contact scheme, and line-type Ge2Sb2Te5. The 512Mb PRAM showed excellent electrical properties of sufficiently large on-current and stable phase transition behavior. The reliability of the 512Mb chip was also evaluated as a write-endurance over 1E5 cycles and a data retention time over 10 years at 85degC


symposium on vlsi technology | 2005

Highly reliable 50nm contact cell technology for 256Mb PRAM

Soon-Hong Ahn; Y.N. Hwang; Y.J. Song; S.H. Lee; S.Y. Lee; J.H. Park; Changbum Jeong; K.C. Ryoo; J.M. Shin; Y. Fai; Jae-joon Oh; Gwan-Hyeob Koh; G.T. Jeong; Suk-ho Joo; Sung-Soo Choi; Yong-Hoon Son; Jungyeop Shin; Y.T. Kim; H.S. Jeong; Kinam Kim

Novel small contact fabrication technologies were proposed to realize reliable high density 256Mb PRAM(phase change memory) product. Introducing the 2-step CMP (chemical mechanical polishing) process and the ring-shaped contact structure, the contact area distribution was greatly improved even at the smallest contact diameter of 50nm node. The validity of this approach was directly confirmed by the evaluation of the functionality for the fabricated 256Mbit PRAM based on 0.10/spl mu/m CMOS technology.


international electron devices meeting | 2003

Writing current reduction for high-density phase-change RAM

Y.N. Hwang; S.H. Lee; Seung-Eon Ahn; S.Y. Lee; K.C. Ryoo; H.S. Hong; H.C. Koo; F. Yeung; Jae-joon Oh; H.J. Kim; Won-Cheol Jeong; J.H. Park; Hideki Horii; Y.H. Ha; J.H. Yi; Gwan-Hyeob Koh; G.T. Jeong; H.S. Jeong; Kinam Kim

By developing a chalcogenide memory element that can be operated at low writing current, we have demonstrated the possibility of high-density phase-change random access memory. We have investigated the phase transition behaviors as a function of various process factors including contact size, cell size and thickness, doping concentration in chalcogenide material and cell structure. As a result, we have observed that the writing current is reduced down to 0.7 mA.


symposium on vlsi technology | 2008

Two-bit cell operation in diode-switch phase change memory cells with 90nm technology

Donghun Kang; Jun-Won Lee; J.H. Kong; Dae-Won Ha; J. Yu; C.Y. Um; J.H. Park; F. Yeung; Jung-hyeon Kim; W.I. Park; Y.J. Jeon; Mi-Hyang Lee; Y.J. Song; Jun-sik Oh; G.T. Jeong; H.S. Jeong

This paper firstly reports key factors which are to be necessarily considered for the successful two-bit (four-level) cell operation in a phase-change random access memory (PRAM). They are: 1) the write-and-verify (WAV) writing of four-level resistance states; and 2) the moderate-quenched (MQ) writing of intermediate resistance levels, 3) the optimization of temporal resistance increase (so-called resistance drift) and 4) of resistance increase after thermal annealing. With taking into account of them, we realized a two-bit cell operation in diode-switch phase change memory cells with 90 nm technology. All of four resistance levels are highly write endurable and immune to write disturbance above 108 cycles, respectively. In addition, they are non-destructively readable above 107 read pulses at 100 ns and 1 uA.


symposium on vlsi technology | 2006

Highly Reliable 256Mb PRAM with Advanced Ring Contact Technology and Novel Encapsulating Technology

Y.J. Song; Kyung-Chang Ryoo; Young-Nam Hwang; Chul Ho Jeong; Dong-won Lim; S.H. Park; Ju-Yong Kim; S.Y. Lee; Jeong-Taek Kong; S.T. Ahn; J.H. Park; Jae-joon Oh; Y. Oh; J.M. Shin; Y. Fai; Gwan-Hyeob Koh; G.T. Jeong; R. Kim; Hyun-Seok Lim; In-sung Park; H.S. Jeong; Kinam Kim

Advanced ring type technology and encapsulating scheme were developed to fabricate highly manufacturable and reliable 256Mb PRAM. Very uniform BEC area was prepared by the advanced ring type technology in which core dielectrics were optimized for cell contact CMP process. In addition, relatively high set resistance was stabilized from encapsulating Ge2Sb2Te5 (GST) stack with blocking layers, thus giving rise to a wide sensing window. These advanced ring type and encapsulating technologies can provide great potentials of developing high density 512Mb PRAM and beyond


symposium on vlsi technology | 2004

Full integration and cell characteristics for 64Mb nonvolatile PRAM

S.H. Lee; Y.N. Hwang; S.Y. Lee; K.C. Ryoo; Seung-Eon Ahn; H.C. Koo; C.W. Jeong; Y.T. Kim; Gwan-Hyeob Koh; G.T. Jeong; H.S. Jeong; Kinam Kim

We have integrated a 64Mb nonvolatile random access memory using phase transition phenomena. Based on 0.18/spl mu/m-CMOS technologies, the vertical contact typed memory cell is fabricated. The device density can be sharply increased with decreasing the writing current and the GST size. But for reduction of writing current, issues including set and interface resistances should be stabilized. Additionally, our results also show the feasibility of 256Mb nonvolatile PRAM with writing time below 100ns.


Applied Physics Letters | 2005

Effective hole injection of organic light-emitting diodes by introducing buckminsterfullerene on the indium tin oxide anode

Il-Hwa Hong; Min-Woo Lee; Young-Mo Koo; H.S. Jeong; Tae-Shick Kim; Ok-Keun Song

We demonstrate that dramatically improved hole injection can be achieved by inserting a very thin C60 film between the indium tin oxide (ITO) electrode and N,N′-diphenyl-N,N′-bis(1,1′-biphenyl)-4,4′-diamine (NPB) layer. This result is ascribed to the formation of an interfacial dipole layer of buckminsterfullerene (C60) on the ITO electrode. The dipole layer induces the surface potential shift that contributes to improve the charge injection efficiency. The chemical shift was downward to help lower the hole injection energy barrier from the ITO electrode to the NPB layer, consistent with the moderately strong electron accepting nature of C60. The enhanced-charge injection provides a simple way of reducing the power consumption of organic electronic devices for real applications.


Applied Physics Letters | 2007

Ge nitride formation in N-doped amorphous Ge2Sb2Te5

Min-Cherl Jung; Y. M. Lee; Hee-seob Kim; Min Gyu Kim; H. J. Shin; Ki-Joon Kim; Se Ahn Song; H.S. Jeong; Changhun Ko; Moonsup Han

The chemical state of N in N-doped amorphous Ge2Sb2Te5 (a-GST) samples with 0–14.3Nat.% doping concentrations was investigated by high-resolution x-ray photoelectron spectroscopy (HRXPS) and Ge K-edge x-ray absorption spectroscopy (XAS). HRXPS showed negligible change in the Te 4d and Sb 4d core-level spectra. In the Ge 3d core-level spectra, a Ge nitride (GeNx) peak developed at the binding energy of 30.2eV and increased in intensity as the N-doping concentration increased. Generation of GeNx was confirmed by the Ge K-edge absorption spectra. These results indicate that the N atoms bonded with the Ge atoms to form GeNx, rather than bonding with the Te or Sb atoms. It has been suggested that the formation of Ge nitride results in increased resistance and phase-change temperature.

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