Hitoshi Higurashi

Advanced electron-beam writing system EX-11 for next-generation mask fabrication

Toshiba and Toshiba Machine have developed an advanced electron beam writing system EX-11 for next-generation mask fabrication. EX-11 is a 50 kV variable-shaped beam lithography system for manufacturing 4x masks for 0.15 - 0.18 micrometer technology generation. Many breakthroughs were studied and applied to EX-11 to meet future mask-fabrication requirements, such as critical dimension and positioning accuracy. We have verified the accuracy required for 0.15 - 0.18 micrometer generation.

Conductance fluctuations in mesoscopic quantum wires near the ballistic regime

Abstract Conductance fluctuations in mesoscopic quantum wires are studied numerically by the transfer matrix method together with the Landauer formula. Results show that the conductance fluctuations never decrease monotonically to zero towards the ballistic regime, but increase initially beyond the universal value and then decrease to zero making peak structures. Peak values are enhanced by the anisotropy of the band structure and the increasing wire width and the strength of impurity potential. The appearance of peak structures is considered due to the competition between the increase in the number of effective channels brought by the breakdown of the Ohms law and the decrease in fluctuations of transmission probabilities. In the very ballistic regime, where the latter dominates fluctuations, a perturbative calculation is also performed to see how the fluctuations decrease. The results are in good agreement with numerical results.

Electron Beam Mask Writer EBM-7000 for Hp 32nm Generation

Optical lithography is facing resolution limit. To overcome this issue, highly complicated patterns with high data volume are being adopted for optical mask fabrications. With this background, new electron beam mask writing system, EBM- 7000 is developed to satisfy requirements of hp 32nm generation. Electron optical system with low aberrations is developed to resolve finer patterns like 30nm L/S. In addition, high current density of 200 A/cm2 is realized to avoid writing time increase. In data path, distributed processing system is newly built to handle large amounts of data efficiently. The data processing speed of 500MB/s, fast enough to process all the necessary data within exposure time in parallel for hp32nm generation, is achieved. And this also makes it possible to handle such large volume dense data as 2G shots/mm2 local pattern density. In this paper, system configuration of EBM-7000 with accuracy data obtained are presented.

Electron-beam mask writer EBM-6000 for 45 nm HP node

In order to comply with the demanding technology requirements for 45 nm half pitch (HP) node (32 nm technology node), Nuflare Technology Inc. (NFT) has developed Electron-beam mask writing equipment, EBM-6000, with increased current density (70A/cm2), while its other primary features basically remain unchanged, namely 50 kV acceleration voltage, Variable Shaped Beam (VSB)/vector scan, like its predecessors [1-5]. In addition, new functionalities and capabilities such as astigmatism correction in subfield, optimized variable stage speed control, electron gun with multiple cathodes (Turret electron gun), and optimized data handling system have been employed to improve writing accuracy, throughput, and up-time. VSB-12 is the standard input data format for EBM-6000, and as optional features to be selected by users, direct input function for VSB-11 and CREF-flatpoly are offered as well. In this paper, the new features and capabilities of EBM-6000 together with supporting technologies are reported to solidly prove the viability of EBM-6000 for 45 nm HP node.

EBM-9000: EB mask writer for product mask fabrication of 16nm half-pitch generation and beyond

In the half pitch (hp) 16nm generation, the shot count on a mask is expected to become bipolar. The multi-patterning technology in lithography seems to maintain the shot count around 300G shots instead of increase in the number of masks needed for one layer. However, as a result of mask multiplication, the better positional accuracy would be required especially in Mask-to-Mask overlay. On the other hand, in complex OPC, the shot count on a mask is expected to exceed 1T shots. In addition, regardless of the shot count forecast, the resist sensitivity needs to be lower to reduce the shot noise effect so as to get better LER. In other words, slow resist would appear on main stream, in near future. Hence, such trend would result in longer write time than that of the previous generations. At the same time, most mask makers request masks to be written within 24 hours. Thus, a faster mask writer with better writing accuracy than those of previous generations is needed. With this background, a new electron beam mask writing system, EBM- 9000, has been developed to satisfy such requirements of the hp 16nm generation. The development of EBM-9000 has focused on improving throughput for larger shot counts and improving the writing accuracy.

Single electron tunneling device controlled by environmental impedance modulation

Abstract A single electron tunneling device consisting of a double junction with inductance, resistance and capacitance (Z-SET) is considered. Current–voltage characteristics are calculated using a self-consistent treatment of the environmental impedance. It is shown that the single electron tunneling can be controlled by modulating the resistive environmental impedance. It is also shown that the controllability of the device is strongly degraded when the capacitance becomes large. This suggests the importance of the careful design of Z-SET against the stray capacitance inevitable in the actual device. The critical value of stray capacitance for controllability of Z-SET is estimated.

Hierarchical processing for accurate optical proximity correction for 1-Gb DRAM metal layers

We propose a high-performance hierarchical mask data processing system which incorporates a refined 1D optical proximity correction (OPC) method. Using an engineering workstation, the system incorporating the refined 1D OPC, corrected the metal layer in a miniature model of a 1-Gbit DRAM within a practical time. Well-designed hierarchical management in the mask data conversion system reduced the correction time to about 1/12 of that in flat processing. Data volume expansion was suppressed within four percent compared to the mask data volume without OPC. Using both exposure experiment and lithography simulation, the correction accuracy was examined when the system was applied to test patterns of metal layer. In the case of 0.16 micrometers design rule, the range of linewidth error with refined 1D OPC was reduced to 62 nm compared to 99 nm with the conventional 1D OPC method. The proposed method is expected to achieve precise correction compared to conventional 1D OPC method. These rules suggest that the proposed OPC system is useful for correction of 1-Gbit DRAM and beyond.

Possible control method for single-electron tunneling based on environmental-impedance modulation

A device that consists of a double tunnel junction and an environmental impedance is considered. The numerical results obtained show that the number of the island charge and the net current of the single-electron-tunneling (SET) device can be controlled by changing the resistive environmental impedance. This suggests a control method for SET devices.

Effects of asymmetric environment on the island charge state of single-electron transistors

A symmetric double tunnel junction with asymmetric environmental impedances is considered. Self-consistent numerical calculations show that the asymmetric environment arises the same effect as the offset charge in the island.

Development of An Accurate Optical Proximity Correction System for 1 Gbit Dynamic Random Access Memory Fabrication

In this paper, we demonstrate the feasibility of a refined one-dimensional (1D) optical proximity correction (OPC) method incorporated into a hierarchical mask data processing system. The correction accuracy was examined using experimental and lithography simulation by application to test patterns of a 1 Gbit dynamic random access memory (DRAM) metal layer. In the case of the 0.16 ?m rule, the standard deviation of the refined 1D OPC was reduced to 9 nm, which is 70% of the standard deviation of 13 nm of the conventional 1D OPC method. The proposed OPC system, using an engineering workstation, succeeded in correcting the metal layer in a miniature model of a 1 Gbit DRAM within 2-4 days. Well-designed hierarchical management in the mask data processing system suppressed mask data volume expansion to within 4% compared to the data volume without OPC. These results suggest that the refined 1D OPC method is useful for the correction of 1 Gbit and future DRAM devices.