Hongwen Yan

Method to controllably form notched polysilicon gate structures

Method for reducing line edge roughness of oxide material using chemical oxide removal

CMOS structure and method for fabrication thereof using multiple crystallographic orientations and gate materials

RESIDUE FREE PATTERNED LAYER FORMATION METHOD APPLICABLE TO CMOS STRUCTURES

Etch selectivity enhancement for tunable etch resistant anti-reflective layer

Semiconductor transistors having high-K gate dielectric layers and metal gate electrodes

Reduced dielectric constant spacer materials integration for high speed logic gates

Apparatus and method for shielding a wafer from charged particles during plasma etching

Method of Removing High-K Dielectric Layer on Sidewalls of Gate Structure

Hard mask process to prevent surface roughness for selective dielectric etching