Huan-Neng Chen

High-performance integrated fan-out wafer level packaging (InFO-WLP): Technology and system integration

Integrated fan-out wafer-level packaging (InFO-WLP) technology with state-of-the-art inductors (quality factor of 42 and self-resonance frequency of 16 GHz) has been demonstrated for heterogeneous integration of digital and radio frequency (RF) systems. InFO-WLP promises superior form factor, pin count, and thermal performance to existing flip-chip ball grid array (FC-BGA) packages. In addition, InFO-WLPs high Q inductors can enhance electrical performance and lower power consumption in RF circuit applications.

A 7nm CMOS platform technology featuring 4 th generation FinFET transistors with a 0.027um 2 high density 6-T SRAM cell for mobile SoC applications

For the first time, a leading edge 7nm CMOS platform technology for mobile SoC applications is presented. This technology provides >3.3X routed gate density and 35%∼40% speed gain or >65% power reduction over our 16nm FinFET technology. A fully functional 256Mb SRAM test-chip with the smallest high density SRAM cell of 0.027um2 is demonstrated down to 0.5V. The 4th generation FinFET transistors are optimized with device mismatch reduction by 25%∼35% and multi-Vt device options to enable low power and high performance design requirements.

A 0.54-0.55 THz 2×4 coherent source array with EIRP of 24.4 dBm in 65nm CMOS technology

This paper presents a monolithically integrated 2×4 coherent source array operating at 0.54-0.55 Tera-Hertz (THz) in 65nm digital CMOS technology. The source array contains 20 oscillating elements which can radiate in-phase THz signal via each of their own differential slot ring antennas. Each of the oscillating elements is made of a triple-pushed Colpitts voltage controlled oscillator (TPCVCO). Among these oscillating elements, 16 are used for radiation source cores and 4 are used for synchronization bridges. The source array is tested to radiate 61 and 126 μW peak power near 0.55 THz by consuming 0.5 and 1.3W DC power, respectively. According to measured antenna directivity of 36.4dBi and simulated radiation efficiency of 50%, source arrays Equivalent Isotropically Radiated Power (EIRP) can be estimated as 21.2 and 24.4 dBm, respectively. The output spectrum can also be tuned from 0.54 to 0.55 THz by varying the transistor bulk voltage. The measured phase noise is -79dBc/Hz at 1 MHz offset. To the best of our knowledge, this is the 1st coherent THz source made of monolithically integrated silicon IC technology beyond 0.5 THz.

A 125GHz transceiver in 65nm CMOS assembled with FR4 PCB antenna for contactless wave-connectors

This paper presents a millimeter-wave (125GHz) based ultra-short distance (∼2mm) contactless wave-connector (CWC) for consumer interconnect applications. Conventional high-speed connectors in interconnect standard such as USB, HDMI, DP, and Thunderbolt are not only expensive, but also suffer poor performance in both mechanical reliability and signal integrity often becoming a bottleneck in high-performance computing systems. The proposed CWC exploits a 125GHz CMOS transmitter (TX), receiver (RX), and compact FR4 PCB antenna to realize high-speed (>10Gb/s), low-cost, and energy-efficient connector solutions. An on-off keying (OOK) modulation is utilized for a non-coherent transceiver (TRX) architecture. In addition, antennas are designed on an FR4HR substrate for a compatibility with an existing infrastructure. The CMOS TX and RX is assembled with the antenna through a flip-chip process. The demonstrated CWC draws a total of 60mW of power under 1.1V supply while transferring 14Gb/s of data rate, achieving 4.28pJ/bit energy efficiency.