Hyuk-Min Kwon

Characterization of Random Telegraph Signal Noise of High-Performance p-MOSFETs With a High-

The behavior of ID random telegraph signal (RTS) noise of a p-MOSFET with an advanced gate stack of HfO2/TaN is experimentally investigated and discussed. The ID-RTS noise is evaluated on a wafer level (100 sites) for statistical evaluation. The observed ratio of ID-RTS noise on a wafer is quite similar to that of a p-MOSFET with the conventional plasma-SiON dielectric, which means that the noise distribution on a wafer level is independent of the gate oxide structure and/or material. However, the relative magnitude of change of the drain current to the applied current (ΔID/ID) of the p-MOSFETs with high-k (HK) dielectrics is greater than that of p-MOSFETs with conventional plasma-SiON dielectrics by about six times due to the greater number of preexisting bulk traps in the HK dielectric. Therefore, ID-RTS noise and its associated 1/f noise can present a serious issue to the CMOSFET with an advanced HK dielectric for low-power analog and mixed-signal applications.

k

The local increase of the threshold voltage of the transfer transistor is proposed to reduce the dark current in a CMOS image sensor. It is suggested that the local increase of the threshold voltage controls the partition noise which contributes to the dark current. The dark current is shown to be reduced considerably by the proposed structure. The proposed method induces little change in the hot carrier reliability as well as in the device performance.

Dielectric/Metal Gate

Highly thermally stable Ni germanide technology for high performance germanium metal-oxide-semiconductor field-effect transistors (Ge MOSFETs) is proposed, utilizing Pd incorporation into Ni germanide. The proposed Ni germanide shows not only the improvement of thermal stability but also the reduction of hole barrier height, which can improve the device on-current by reducing the Ni germanide to p+ source/drain contact resistance. The proposed Ni germanide showed a stable sheet resistance of up to 500degC 30-min postgermanidation annealing due to the suppression of agglomeration and oxidation of Ni germanide and the diffusion of Ni and Ge atoms by the incorporated Pd. Therefore, the proposed Ni0.95Pd0.05 alloy could be promising for the high mobility Ge MOSFET applications.

Decrease of Dark Current by Reducing Transfer Transistor Induced Partition Noise With Localized Channel Implantation

We report on the impact of H₂ high-pressure annealing (HPA) onto In_0.7Ga_0.3As MOSCAPs and quantum-well (QW) MOSFETs with Al₂O₃/HfO₂ gate-stack. After HPA with process condition of 300°C, H₂ ambient and pressure of 20 atm, we observed notable improvements of the capacitance-voltage (CV) characteristics in InGaAs MOSCAPs with Al₂O₃/HfO₂ gate-stack, such as reduction of equivalent-oxide-thickness and less frequency dispersion in the accumulation region. There was 20% improvement of the interfacial trap density (Dit). Then, we incorporated the HPA process into the fabrication of sub-100-nm In_0.7Ga_0.3As QW MOSFETs, to investigate the impact of HPA process. After HPA process, the device with L_g = 50 nm exhibits improved subthreshold-swing (SS) = 105 mV/decade, in comparison with SS = 130 mV/decade for the reference device without HPA process. Finally, we carried out reliability assessment under a constant-voltage-stress (CVS), and it turns out that the HPA process was effective in mitigating a shift of threshold voltage (ΔV_T) during the CVS. These are attributed to the effective passivation of oxide traps in the high-k dielectric layer and interfacial traps, after HPA process in the H₂ ambient.

Thermal Immune Ni Germanide for High Performance Ge MOSFETs on Ge -on- Si Substrate Utilizing

The effect of high-pressure deuterium (D) and hydrogen (H) annealing on random telegraph signal (RTS) noise characteristics of source follower (SF) block, SF, and row selector (SEL) transistors in CMOS image sensor (CIS) active pixel sensor (APS) was comparatively analyzed in depth. RTS noise characteristics of SF transistor (M1) and SEL transistor (M2) with forming gas (FG) annealing showed the smallest Δ<i>I</i>_D/<i>I</i>_D, whereas FG annealing was not efficient to reduce the RTS noise of SF block (M1 + M2). Although Δ<i>I</i>_D/<i>I</i>_D of SF block was reduced by high-pressure H₂ annealing, high-pressure D₂ annealing showed the greatest reduction in Δ<i>I</i>_D/<i>I</i>_D of SF block (M1 + M2), which was believed to attribute to the effective passivation of interface traps by the isotope effect of D. Therefore, high-pressure D₂ annealing is potentially significant for reducing RTS noise characteristics and thermal budget as well as improving device performance in CIS APS.

\hbox{Ni}_{0.95}\hbox{Pd}_{0.05}

In this paper, the dependence of negative bias temperature instability (NBTI) and low-frequency noise characteristics on the various nitrided gate oxides is reported. The threshold voltage shift (ΔVT) under NBTI stress for thermally nitrided oxide (TNO) was greater than that of plasma nitrided oxide (PNO), whereas the slopes of ΔVT versus stress time for PNO were similar to those for TNO. The flicker noise (1/f noise) characteristic of PNO was better than that of TNO by about 1 order of magnitude, although the 1/f noise of PNO showed almost the same dependence on the frequency as that of TNO. The carrier number fluctuation model due to the trapping and detrapping of electrons in oxide traps was found to be a dominant mechanism of flicker noise. The probability of the generation of drain current random telegraph signal (ID–RTS) noise shows similar values (70–78%) for all nitrided oxides, which shows that the generation of RTS noise is not greatly affected by the nitridation method or nitrogen concentration.

Alloy

Time-dependent dielectric breakdown (TDDB) characteristics of La2O3-doped high-k dielectric in Hf-based high-k/TaN metal gate stack were studied. Unlike the abrupt breakdown in the conventional SiO2 , dielectric breakdown behaviors of La-incorporated HfON and HfSiON dielectrics show progressive breakdown characteristics. Moreover, the extracted Weibull slope beta of breakdown distribution is in the range of 0.87-1.19, and it is independent on capacitor areas and stress conditions. Moreover, field dependence of TBD and stress-induced leakage current strongly suggest that the E-model is more applicable to explain in TDDB of La-incorporated high-k dielectric in Hf-based high-k/metal gate stack structure.

Impact of H 2 High-Pressure Annealing Onto InGaAs Quantum-Well Metal–Oxide–Semiconductor Field-Effect Transistors With Al 2 O 3 /HfO 2 Gate-Stack

In this paper, the effect of fluorine implantation on the recovery characteristics of p-channel MOSFETs (PMOSFETs) after negative bias temperature instability (NBTI) stress was investigated. PMOSFETs using fluorine ion implantation (F-I/I) performed better than those without F-I/I after NBTI stress; it is thought that F-I/I can suppress the generation of permanent damage during NBTI stress. The relationship of ΔVth and ΔSS during NBTI stress and recovery showed how much permanent damage occurred. In addition, we confirmed with a 1/f noise measurement that the device with F-I/I was immune to NBTI stress in spite of a pre-existing bulk trap caused by implantation damage. Moreover, the device with F-I/I had greater activation energy than the device without F-I/I. As indicated by the results, fluorine implantation can decrease the generation of permanent damage under NBTI stress because of the stable Si–F bond.

Effects of High-Pressure Annealing on Random Telegraph Signal Noise Characteristic of Source Follower Block in CMOS Image Sensor

In this work, new test structures are proposed to characterize the RTS (Random Telegraph Signal) noise of the CMOS image sensor. The RTS noise of the driver transistor and the source follower transistor, as well as the source follower block itself, are measured using the proposed test structures. The probability of monitoring the RTS noise of the driver transistor and the source follower transistor is 76 % and 52 %, respectively. However, the probability of the generation of the RTS noise for the source follower block is about 74 %. Therefore, it can be said that the driver transistor dominates the RTS noise of the source follower block.

Effect of Nitrogen Concentration on Low-Frequency Noise and Negative Bias Temperature Instability of p-Channel Metal--Oxide--Semiconductor Field-Effect Transistors with Nitrided Gate Oxide

A novel test structure of bipolar junction transistors fabricated using CMOS technology is proposed for high-performance analog applications. The matching characteristics of collector current IC and current gain β of the proposed structure show improvement of about 31% and 24%, respectively, over those of the conventional structure, although the area of the proposed structure is smaller than that of the conventional structure. The proposed structure exhibits a decrease in collector current and current gain of less than 7.4% and 1.8%, respectively, compared with the conventional structure. The proposed test structure is highly promising for CMOS-based, high-performance, analog applications.