Il-kyoung Kim

Development of New Batch-Type Plasma Assisted NOR (Native-Oxide-Removal) Dry Cleaning Equipment

Introduction The more accumulative electronic devices are required, the smaller features, whose smallest size is measured by lithography half-pitch, should be achieved for semiconductor fabrication. Unexpected design and fabrication difficulties should be also overcome as devices shrink. One of difficulties is contact resistance by unforeseen insulation native oxide layers in junction areas. An even so thin native oxide layer may make contact resistance drastically higher and therefore brings about VLSI chip operation fails. Other problems by native oxide include current leakage at gate oxide and insufficient silicide formation on a device. To resolve these issues, surface cleaning process becomes very critical to make super-clean silicon surface on contact areas and thus semiconductor industry has developed various native oxide removal methods to obtain better chip productivity. We, in this paper, present a new and more effective cleaning way by an efficient batch type apparatus with a dry process to achieve super-clean silicon surface on very small contact holes of semiconductor chips.