Ingrid Vos
Katholieke Universiteit Leuven
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Featured researches published by Ingrid Vos.
international interconnect technology conference | 2003
Rudy Caluwaerts; M. Van Hove; Gerald Beyer; Romano Hoofman; H. Struyf; G.J.A.M. Verheyden; Joost Waeterloos; Zsolt Tokei; Francesca Iacopi; L. Carbonell; Quoc Toan Le; Arabinda Das; Ingrid Vos; S. Demuynck; Karen Maex
The creation of meso porosity in single damascene structures after patterning has been investigated to facilitate the sealing of the sidewalls by iPVD barriers. The dielectric stack consists of developmental porous SILK (v7) resin (SiLK is a trademark of The Dow Chemical Company) and a chemical vapor deposited hard mask. Porous SILK (v7) resin was selected since the temperature of vitrification of the material is lower than the temperature of porogen burn out. Creation of meso porosity after patterning results in smooth trench sidewalls, leading to an improved iPVD barrier integrity, as opposed to the conventional process sequence, which gives rise to large, exposed pores at the sidewall.
Journal of Chemical Physics | 1994
Arnout Ceulemans; P.W. Fowler; Ingrid Vos
A model for the vibrations of a cage molecule in terms of the motions of an infinitely thin spherical shell is applied to icosahedral C60. When appropriate values are given to the two free parameters, the model accounts for the general pattern, energy ordering, radial, and tangential characteristics of the vibrations, giving results comparable to those from a six‐parameter conventional valence force field. In the model, the lowest frequency of any spherical‐shell molecule is the ‘‘d’’ squashing deformation that describes tidal waves on a flooded planet.
Microelectronic Engineering | 2002
Arabinda Das; T. Kokubo; Y. Furukawa; Herbert Struyf; Ingrid Vos; Bram Sijmus; Francesca Iacopi; J. Van Aelst; Quoc Toan Le; L. Carbonell; Sywert Brongersma; Mireille Maenhoudt; Zsolt Tokei; Iwan Vervoort; Erik Sleeckx
Increasing the circuit density is driving the need for lower permittivity interlayer dielectrics (ILD) to reduce the capacitance between long parallel lines. JSRs LKD-5109, an MSQ-based material, is one of such low-k materials for the 65-nm node. The feasibility of integrating LKD-5109 in a single inlaid structure has been investigated. Thermal stability, chemical compatibility to stripping agents and CMP slurries are verified. A single damascene structure incorporating a dual CVD hard mask has been attempted and electrical results have been evaluated.
Microelectronic Engineering | 2001
R. A Donaton; Bart Coenegrachts; Mireille Maenhoudt; Ivan Pollentier; Herbert Struyf; S. Vanhaelemeersch; Ingrid Vos; Marc Meuris; Wim Fyen; Gerald Beyer; Zsolt Tokei; Michele Stucchi; Iwan Vervoort; David De Roest; Karen Maex
Abstract In this work we discuss the importance of selecting the hard mask material and choosing the optimum dry etch and post-CMP clean processes on the integration of Cu and organic low-k dielectrics. The hard mask material plays an important role in the interline capacitance and in the effective dielectric constant of the interconnects. One generation of effective k can be gained simply by replacing the hard mask material by one with a lower dielectric constant, instead of moving to a more advanced low-k material. Interline leakage is not affected by the hard mask material and low values (∼10−9 A/cm2) are obtained at electric fields of 1 MV/cm for structures with spacing down to 0.2 μm. A non-optimized dry etch process for trench definition can result in undercutting, which affects the Cu filling of the trenches. From our results it is clear that the process conditions (lithography, etch, CMP) affect the geometry of the structures, which has a big impact on the effective dielectric constant of the interconnects.
Meeting Abstracts | 2011
Ingrid Vos; David Hellin; Johan Vertommen; Marc Demand; Werner Boullart
Silicon nano-pillars as test structures for quantitative evaluation of advanced wafer drying are presented. The method consists of the use of pillar structures with an aspect ratio up to 28 in combination with top-down SEM inspection and subsequent image analysis for quantification. The test vehicle allows characterizing cleaning techniques by a threshold aspect ratio below which value the features do not collapse. As such, a higher critical aspect ratio corresponds to a superior wetting/drying method. Furthermore, as the metrology is specific and includes cluster size distribution analysis, it can bring new insights in the mechanism of pattern collapse.
Molecular Physics | 1991
Arnout Ceulemans; Ingrid Vos
The Lagrangian equations of motion for an infinitely thin vibrating ring and shell are derived, starting from the stretching and bending interactions of molecular force fields. The resulting spectral patterns form useful tools to classify the vibrational levels in annular and globular molecules. They provide a set of parent symmetry labels and predict the relative energetic ordering of the vibrational modes. The method is illustrated for the simple case of the skeletal modes in benzene. The results are compared with the classical treatments of elasticity theory, and with the tensor surface harmonic theory of cluster bonding.
Microelectronic Engineering | 2003
Francesca Iacopi; Michael Patz; Ingrid Vos; Zsolt Tokei; Bram Sijmus; Quoc Toan Le; Erik Sleeckx; Brenda Eyckens; Herbert Struyf; Arabinda Das; Karen Maex
The importance of interface quality in the single damascene integration process of LKD5109TM porous low-k films is investigated. A strong correlation is observed between chemical mechanical planarization (CMP) performance and LKD/cap layer interfacial fracture energies. The use of FF02TM as cap layer material (an on-purpose developed spin-on organic hard-mask) on LKD leads to superior interfacial adhesion and metal continuity yield as compared to the use of chemical vapour deposition SiC:H cap films. The adhesion quality of LKD/liner films appears less critical than LKD/cap layer adhesion as far as CMP performance is concerned. Electrical line-to-line performance is not always directly correlated with adhesion but rather, more generally speaking, with interface quality (i.e., presence of defects/dangling bonds or moisture). The introduction of surface pre-treatments to enhance interfacial adhesion leads to degradation in both leakage current and breakdown field behaviour because of damage induced at the interface.
international interconnect technology conference | 2001
Joost Waeterloos; H. Struyf; J. Van Aelst; D.W. Castillo; S. Lucero; Rudy Caluwaerts; Carine Alaerts; G. Mannaert; Werner Boullart; Erik Sleeckx; Marc Schaekers; Z. Tokel; Iwan Vervoort; J. Steenbergen; Bram Sijmus; Ingrid Vos; Marc Meuris; Francesca Iacopi; R.A. Donaton; M. Van Hove; S. Vanhaelemeersch; Karen Maex
The feasibility of integrating a SiLK* Semiconductor Dielectric film (*trademark of The Dow Chemical Company) that contains closed pores was studied using a single damascene test vehicle. The study focussed on tool qualification, process set-up and single damascene feasibility to demonstrate technology extendibility. The results indicate that only minor changes have to be made to the process conditions when transitioning from a dense to a porous SiLK* film.
Microelectronic Engineering | 2003
Stephane Malhouitre; C. Jehoul; J. Van Aelst; Herbert Struyf; Sywert Brongersma; L. Carbonell; Ingrid Vos; Gerald Beyer; M. Van Hove; D. Gronbeck; M. Gallagher; J. Calvert; Karen Maex
ZirkonTM LK2000 version 1 dielectric film (ZirkonTM is a trademark of Shipley Company L.L.C), a porous methylsilsesquioxane (MSQ)-based spin-on dielectric with a k value targeted at 2.0, has been integrated in single damascene structures. For patterning, a dual SiC/SiO2 CVD hard-mask was used. Surface treatments (DUV ozone (DUV-O3), plasma treatments) were tested to solve the adhesion issues encountered at the CVD hard-mask and the low-k interface. Adhesion is only improved when plasma treatments are used. Analyses (FTIR, TDS, nano-indentation) show that the plasma treatments only modify the low-k surface. For integration, a plasma treatment (He, NH3, N2/O2) prior to deposition of the CVD hard-mask was included. After patterning, copper metallization and CMP of the wafers, electrical evaluation shows that, compared to the reference wafer (no plasma treatment), plasma-treated wafers have a higher yield and a lower sheet resistance. The RC delay is slightly higher for the plasma-treated wafers than for the reference wafer.
Meeting Abstracts | 2007
Ingrid Vos; David Hellin; Steven Demuynck; Olivier Richard; Thierry Conard; Johan Vertommen; Werner Boullart
For every new technology node, the specifications for different processing steps become more stringent. For cleaning, one strives to continuously reduce the loss of substrate and film thickness while maintaining a high cleaning efficiency. Short and well-controlled chemical exposure times are desired and may enable the use of more aggressive chemistries. Reducing delay time between etching and subsequent wet clean, by introducing clustered processing, may allow for more effective residue removal. This paper describes a novel cleaning concept, Confined Chemical CleaningTM, and its application in post contact etch residue removal. The technique combines short and controlled exposure times with clustered processing for residue removal.