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Dive into the research topics where Jeremy A. Wahl is active.

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Featured researches published by Jeremy A. Wahl.


international workshop on junction technology | 2012

Modifications of growth of strained silicon and dopant activation in silicon by cryogenic ion implantation and recrystallization annealing

Hiroshi Itokawa; Nathaniel Berliner; Sean Teehan; Donald R. Wall; Jeremy A. Wahl; Eunha Kim; Juntao Li; J. Demarest; Paul Ronsheim; Vamsi Paruchuri

Formation of heavy C and/or P doping Si alloy with a strain and/or low resistivity in FinFET S/D having only {110} plane on fin sidewall poses a challenge because, if the CVD selective epitaxy typically used in recent S/D process integration is employed, it is extremely difficult to grow heavily doped Si alloys with defect-free microstructure on {110} crystallographic plane. We propose the combination of cryogenic ion-implant amorphization followed by nonmelt laser annealing regrowth for both strained C-incorporated Si solid-phase epitaxy and improvement of P-activation in heavily P-doped Si alloy epitaxially grown film, while annihilating defects. In this paper, the diffusion and the activation of C atoms and P atoms in Si with C additive are investigated for different nonmelt laser annealing conditions. Additionally, the influence of cryogenic implantation of Si+ into amorphized P-doped Si epitaxial layer followed by nonmelt laser annealing recystallization on the diffusion and activation of P atoms in Si is discussed.


Proceedings of SPIE | 2016

XPS-XRF hybrid metrology enabling FDSOI process

Mainul Hossain; Ganesh Subramanian; Dina H. Triyoso; Jeremy A. Wahl; Timothy J. Mcardle; Alok Vaid; Abner Bello; Wei Ti Lee; Mark Klare; Michael Kwan; Heath Pois; Ying Wang; Tom Larson

Planar fully-depleted silicon-on-insulator (FDSOI) technology potentially offers comparable transistor performance as FinFETs. pFET FDOSI devices are based on a silicon germanium (cSiGe) layer on top of a buried oxide (BOX). Ndoped interfacial layer (IL), high-k (HfO2) layer and the metal gate stacks are then successively built on top of the SiGe layer. In-line metrology is critical in precisely monitoring the thickness and composition of the gate stack and associated underlying layers in order to achieve desired process control. However, any single in-line metrology technique is insufficient to obtain the thickness of IL, high-k, cSiGe layers in addition to Ge% and N-dose in one single measurement. A hybrid approach is therefore needed that combines the capabilities of more than one measurement technique to extract multiple parameters in a given film stack. This paper will discuss the approaches, challenges, and results associated with the first-in-industry implementation of XPS-XRF hybrid metrology for simultaneous detection of high-k thickness, IL thickness, N-dose, cSiGe thickness and %Ge, all in one signal measurement on a FDSOI substrate in a manufacturing fab. Strong correlation to electrical data for one or more of these measured parameters will also be presented, establishing the reliability of this technique.


Archive | 2011

FIN-FET device and method and integrated circuits using such

Jeremy A. Wahl; Kingsuk Maitra


Archive | 2011

COMBINED PLANAR FET AND FIN-FET DEVICES AND METHODS

Jeremy A. Wahl; Kingsuk Maitra


Archive | 2012

METHODS OF EPITAXIAL FINFET

Nicholas V. LiCausi; Jeremy A. Wahl


Archive | 2012

Methods of FinFET height control

Nicholas V. LiCausi; Jeremy A. Wahl


Archive | 2016

Integrated circuits with dual silicide contacts and methods for fabricating same

Shao Ming Koh; Guillaume Bouche; Jeremy A. Wahl; Andy Wei


Archive | 2013

Methods of forming dielectrically isolated fins for a FinFET semiconductor by performing an etching process wherein the etch rate is modified via inclusion of a dopant material

Nicholas V. LiCausi; Jeremy A. Wahl


Archive | 2013

METHODS OF FORMING A SEMICONDUCTOR DEVICE WITH A NANOWIRE CHANNEL STRUCTURE BY PERFORMING AN ANNEAL PROCESS

Jody A. Fronheiser; Jeremy A. Wahl; Kerem Akarvardar; Ajey Poovannummoottil Jacob; Daniel T. Pham


Archive | 2014

Integrated circuits with metal-insulator-semiconductor (mis) contact structures and methods for fabricating same

Guillaume Bouche; Shao Ming Koh; Jeremy A. Wahl; Andy Wei

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