Jerry Lemberg

RX-Band Noise Reduction in All-Digital Transmitters With Configurable Spectral Shaping of Quantization and Mismatch Errors

This paper describes the first purely digital approach to reduce the receive band noise in digitally-intensive RF transmitters. The proposed solution applies bandpass delta-sigma modulation and dynamic element matching (DEM) to the receive band (RX-band) instead of the transmit band. This enables selective attenuation of the noise originating from amplitude quantization and static mismatches of the digital-to-analog converter (DAC), which would otherwise reach the transmitter output almost unattenuated. A highly configurable 4th-order noise transfer function is designed to achieve optimum attenuation in the programmable RX-band, while ensuring negligible degradation of the transmitted signal quality as well as stable operation of the tree structure DEM encoder. A general validation of DEM, independent from the duration of the DAC impulse response, is also presented. The proposed solution is verified through system-level simulations with LTE signals. In the presence of typical amplitude and timing mismatches, the RX-band noise can be reduced below -160 dBc/Hz without filtering after the DAC, thus potentially enabling SAW-less operation of all-digital transmitters.

A configurable sampling rate converter for all-digital 4G transmitters

This paper presents a digital interpolation chain for non-integer variable-ratio sampling rate conversion, targeted to 4G mobile applications. Such a system is needed in all-digital transmitters, where the sampling rate of the digital input to the RF front-end must be an integer fraction of the carrier frequency. A highly configurable architecture is proposed to cope with the flexibility needed in 4G applications. The system achieves excellent ACLR of 75 dB, EVM degradation of 0.05%, and RX-band noise below -160 dBc/Hz. Digital synthesis of the circuit in a 40nm low-power CMOS process results in a core area of only 0.073 mm2. The estimated power consumption is between 6 and 29 mW, depending on channel bandwidth and transmission band.

Class D CMOS power amplifier with on/off logic for a multilevel outphasing transmitter

In this paper, we present a class D power amplifier (PA) design in 28 nm CMOS for a multilevel outphasing transmitter. For increased output power, the design consists of eight unit PAs with cascoded output stages. In order to improve back-off efficiency from conventional outphasing, the PAs are switched on and off in pairs for different amplitude levels, which is challenging to implement with cascoded class D. As a solution, we introduce a new on/off switching method based on logic gates utilizing two square wave voltages to produce either a similar square wave or a constant voltage. This method enables a higher level of integration by using low-voltage digital signals for on/off control, while eliminating the timing mismatch between output transistors caused by a level shifter. The simulated peak output power of the PA is 32.4 dBm, and its peak efficiency is 34.1%.

Digital Interpolating Phase Modulator for Wideband Outphasing Transmitters

Radio transmitters are evolving towards digital-intensive solutions to exploit reconfigurability and benefit from CMOS process scaling. Outphasing has been identified as a suitable candidate for digital wideband transmitters. However, with recent digital-intensive outphasing transmitters the achieved performance in terms of adjacent channel leakage ratio (ACLR) has been limited. This paper identifies the sampling images of the modulating phase signal as the main factor limiting the ACLR of digital outphasing transmitters. We present a new digital interpolating phase modulator architecture, capable of providing significantly better sampling image attenuation. When evaluated in outphasing configuration with a 100 MHz OFDM signal at the carrier frequency of 2.46 GHz, and 10-bit phase resolution, the proposed solution achieves an ACLR of -59 dBc, compared to -43 dBc achievable with the phase modulator architecture utilized in state-of-the-art digital outphasing transmitters. The proposed digital interpolating phase modulator is also capable of custom carrier generation, a straightforward method for generating an arbitrary carrier frequency up to 1.25 times the phase modulator sampling rate.

A 30-dBm Class-D Power Amplifier with On/Off Logic for an Integrated Tri-Phasing Transmitter in 28-nm CMOS

This paper presents an eight-unit class-D power amplifier (PA), implemented in 28-nm CMOS. The PA is designed to utilize tri-phasing modulation, which combines coarse-amplitude polar modulation with fine-resolution outphasing components. This new technique enables achieving the back-off efficiency of multilevel outphasing without linearity-degrading discontinuities in the output waveform. Each PA unit contains a cascoded output stage with a 3.6-V supply voltage, and on/off logic enabling multilevel operation controlled by low-voltage signals. The PA achieves a peak output power of 29.7 dBm with a 34.7% efficiency, and is verified to operate with aggregated LTE signals at bandwidths up to 60 MHz at 1.7-GHz carrier frequency.

13.5 A 0.35-to-2.6GHz multilevel outphasing transmitter with a digital interpolating phase modulator enabling up to 400MHz instantaneous bandwidth

Advanced wireless radio standards set stringent requirements on the bandwidth, frequency range and reconfigurability of base-station transmitters. Recently, the outphasing concept has shown promise of wide bandwidth while taking advantage of process scaling with extensive exploitation of rail-to-rail signaling. Recent outphasing transmitter designs have often focused on power-amplifier (PA) and power-combiner implementations while omitting the phase modulator [1,2]. Moreover, previously reported transmitters with integrated digital phase modulators have only shown bandwidths up to 40MHz [3,4], although 133MHz has been demonstrated at 10GHz carrier frequency utilizing phase modulators based on conventional IQ-DACs [5]. Thus, digital-intensive outphasing transmitters capable of modulation with hundreds of MHz bandwidth at existing cellular frequency bands have not yet been published. To address the aforementioned challenge, this paper introduces a multilevel outphasing transmitter with four amplitude levels, including the first prototype implementation based on the digital interpolating phase modulator concept [6]. The transmitter is targeted for 5G picocell base stations and has been verified to operate with instantaneous bandwidth up to 400MHz. In addition, the developed phase modulator eliminates the need for complex on-chip frequency synthesizers by introducing digital carrier frequency generation, demonstrated between 0.35 and 2.6GHz, while utilizing a single 1.8GHz reference clock.

Multilevel outphasing power amplifier system with a transmission-line power combiner

This paper presents a multilevel outphasing power amplifier (PA) system consisting of eight class-D unit PAs on 28 nm CMOS and an off-chip transmission-line power combiner. The combiner, implemented on PCB with microstrip lines, was designed to operate at 1.8 GHz frequency and filter out the third and fifth harmonics generated by the PAs. The combiner layout was designed so that the line spacing increases towards the output to reduce coupling, while the lines are equal in length. The simulated maximum output power is 32.3 dBm (1.71 W) with an efficiency of 34.4%. With 20 MHz and 100 MHz LTE signals, average efficiencies of 15.2% and 15.1% were achieved, respectively.

A programmable DSP front-end for all-digital 4G transmitters

This paper presents a digital interpolation chain for non-integer large-ratio sampling rate conversion, targeted to 4G applications. Such a system is needed in all-digital transmitters, where the sampling rate of the digital input to the RF front-end must be an exact submultiple of the carrier frequency. A highly flexible architecture is proposed to reduce system complexity when the RF requirements are more relaxed. The presented interpolation chain has been especially optimized by taking into account the requirements for LTE and LTE-A, but it can be used in multistandard applications as well. The system achieves excellent ACLR of 83 dB, EVM degradation of 0.03%, and RX-band noise below -160 dBc/Hz.