Jinhong Park

Properties of EUVL masks as a function of capping layer and absorber stack structures

We have fabricated extreme ultraviolet lithography (EUVL) blank masks consisting of a TaN absorber, Ru capping layer, and Mo/Si multilayers using ion-beam sputter deposition and investigated their dependence on capping layer and absorber stack structure. At EUV wavelengths, the reflectivities of the multilayers, including their dependency on the thickness of the capping and absorber layers, are in good agreement with simulation results obtained using Maxwell equations and the refractive indexes of each layer. Ru, one of the most promising capping materials on Mo/Si multilayers due to its resistance to oxidation and selectivity to etching, also shows better EUV reflectivity than Si as a capping layer if we choose a thickness that produces a constructive interference. To meet the reflectivity requirements (⩽ 0.5 %) in the SEMI EUVL mask standard specifications, a TaN absorber at least 70 nm thick should be applied. However, aerial image results simulated by using EM-Suite show that 40 nm is sufficient for the TaN absorber to display the maximum image contrast. In addition, horizontal-vertical (HV) biasing effects due to mask shadowing become negligible if the TaN is reduced to about 40 nm. As a result, we suggest using a thin TaN absorber 40 nm thick since it is able to minimize mask shadowing effects without a loss of image contrast.

Progress in EUV lithography toward manufacturing

In this article the recent progress in the elements of EUV lithography is presented. Source power around 205W was demonstrated and further scaling up is going on, which is expected to be implemented in the field within 2017. Source availability keeps improving especially due to the introduction of new droplet generator but collector lifetime needs to be verified at each power level. Mask blank defect satisfied the HVM goal. Resist meets the requirements of development purposes and dose needs to be reduced further to satisfy the productivity demand. Pellicle, where both the high transmittance and long lifetime are demanded, needs improvements especially in pellicle membrane. Potential issues in high-NA EUV are discussed including resist, small DOF, stitching, mask infrastructure, whose solutions need to be prepared timely in addition to high-NA exposure tool to enable this technology.

The application of EUV lithography for 40nm node DRAM device and beyond

Extreme ultraviolet lithography (EUVL) is one of the leading candidates for next-generation lithography technology for the 32 nm half-pitch node and beyond. We have evaluated the Alpha Demo Tool(ADT) characterizing for mixed-andmatched overlay(MMO), flare noise, and resolution limit. For process integration, one of the important things in EUVL is overlay capability. We performed an overlay matching test of a 1.35NA and 193 immersion tool using a low thermal expansion material(LTEM) mask. We also investigated the flare level of the EUV ADT for device applications. The current EUV tool has a higher flare level than ArF lithography tools. We applied a contact layer for 40nm node device integration to reduce the variation in critical dimension(CD) from the flare noise.

Fast mask CD uniformity measurement using zero order diffraction from memory array pattern

CD Uniformity (CDU) control is getting more concerning in lithographic process and required to control tighter as design rule shrinkage. Traditionally CDU is measured through discrete spatial sampling based data and interpolated data map represents uniformity trends within shot and wafer. There is growing requirement on more high sampling resolution for the CDU mapping from wafer. However, it requires huge time consumption for CD measurements with traditional methods like CD-SEM and OCD. To overcome the throughput limitation, there was an approach with inspection tool to measure CD trends on array area which showed good correlation to the traditional CD measurement. In this paper, we suggest a fast mask CD error estimation method using 0th order of diffraction. To accomplish fast measurement, simple macro inspection tool was adopted to cover full wafer area and scan result gives good correlation with mask uniformity data.

Assessment of full-chip level EUV optical correction for sub-40nm memory device

The two key factors in EUV lithography imaging will be flare and shadow effect among other issues. The flare which is similar to the long range density loading effect and also known to be of high level will generate CD variation throughout the exposure field while the EUV specific shadow effect differentiates H-V CDs along the slit. The long range character of flare in EUV full field scanner can even affect CDs in the neighboring fields. It seems to be apparent that the major imaging challenges for EUV lithography to be successfully adopted and applied to device manufacturing will be determined by how smartly and effectively CD variations induced both by flare and shadow effect in the full chip level are compensated. We investigated and assessed the previously proposed full chip level compensation strategies of the flare and shadow effect in EUVL for the application to memory device both by simulation and experiments on the condition of full field scanner. The effectiveness of flare compensation for the case of thin absorber mask was also addressed together with related impact on the shadow induced H-V CD bias.