Jürgen Niess

Process-Induced Diffusion Phenomena in Advanced CMOS Technologies

The continuous scaling of electron devices places strong demands on device design and simulation. The currently prevailing bulk transistors as well as future designs based on thin silicon layers all require a tight control of the dopant distribution. For process simulation, especially the correct prediction of boron diffusion and activation was always a problem. The paper describes the model developed for boron implanted into crystalline silicon and shows applications to hot-shield annealing and flash-assisted rapid thermal processing.

Investigation of Ultra Thin Thermal Nitrided Gate Dielectrics in Comparison to Plasma Nitrided Gate Dielectrics for High-Performance Logic Application for 65nm

In this work we present a comprehensive comparison of ultra thin thermally nitrided (TN) to plasma nitrided (PN) gate dielectrics (GD). We will show that thermal nitridation is a promising technique to increase the nitrogen concentration up to 25%. Furthermore, we will demonstrate that ultra thin thermally nitrided GD have the potential to be an alternative solution compared to plasma nitrided GD. This work includes the analysis of physical and electrical parameters as well as reliability results from reliability characterization. Additionally, we investigated the impact of Deuterium on electrical parameters and reliability behavior.