Klaus Schrüfer

ESD Evaluation of the Emerging MuGFET Technology

ESD characteristics of fully depleted (FD) FinFET devices are presented and compared to planar structures manufactured in the same multiple-gate FET (MuGFET) technology. FinFET-type MOS devices in breakdown mode are found to show an unprecedented sensitivity to ESD stress, while planar devices and FinFET gated diodes perform reasonably and with I-V characteristics beneficial for ESD protection.

Device Design Evaluation of Multigate FETs Using Full 3D Process and Device TCAD Simulation

Full 3D numerical process and device simulations have been performed in order to optimize device design of multigate FETs (MuGFETs) and the underlying fabrication processes. At first process simulation parameters have been calibrated to measurement data of pre-development process results. Based on this, device electrical performance has been assessed for different gate length, fin doping, implant conditions, fin height, fin width, gate oxide and box thickness by means of typical device parameters.