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Dive into the research topics where Leo M. Higgins is active.

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Featured researches published by Leo M. Higgins.


electronic components and technology conference | 2010

Challenges of Cu wire bonding on low-k/Cu wafers with BOA structures

Chu-Chung Lee; Leo M. Higgins

This study describes the development of a Cu wire bond assembly solution for ICs using low dielectric constant (low K) dielectrics and Cu interconnect, with bond pads designed with aggressive BOA (Bond Over Active) design rules. The various wire bonding challenges imposed by the bond pad material stack and the aggressive high density BOA design will be discussed. It is desired to use the aggressive BOA rules since this provides greater design flexibility and can result in a smaller die size. The suitability of two different bond pad and BOA structures, currently used with Au wire bonding, was evaluated to assess viability for high reliability Cu wire bonding. The assembly process, the bond quality requirements, the reliability stress testing, and the impact on the Cu wire bonds will be described. Corrosion of the Cu-Al IMC (interface metallic compound) bond phase(s) that can be seen with environmental stress testing will be discussed. The hypothesis that the IMC corrosion is due to attack by impurities in the epoxy-based molding compound will be discussed. The results of a thermal aging study (150°C / 504 hrs), demonstrating the slow growth of the CuAl IMC structure, and analysis of the Cu-Al IMC phases will also be reported.


electronic components and technology conference | 2011

Copper wire bonding on low-k/copper wafers with Bond Over Active (BOA) structures for automotive customers

Tu Anh Tran; Chu-Chung Lee; Varughese Mathew; Leo M. Higgins

The gold price has continuously climbing since 2000 and is currently recorded at historical high at above USD1350 per ounce in October 2010 as compared to USD1000 per ounce one year ago. Gold wire bonding has been the primary wire interconnecting method used in the semiconductor packaging industry for more than 50 years. Gold wire historically represented about 20-25% of the package cost. With the ever increasing gold price, this ratio now can be as high as 30-35% of the package cost and does not look like there is a relief in sight. Replacing gold wire with copper wire has become a necessity in order to maintain low assembly cost for wire bonded parts. Copper wire has many benefits including low cost, high electrical and thermal conductivities and excellent reliability with aluminum pad metallization. Heavy gauge copper wire has been used in consumer products and semiconductor discrete products for a long time. Many commercial product sectors began thin gauge copper wire in production since 2008. Automotive customers are also forced to look for cheaper interconnecting alternative, such as copper wire as an example. One of the issues in qualifying copper wire for automotive customers with stringent reliability requirements is that no industrial standard has been agreed or published to define copper wire qualification requirements. Presently most companies still apply gold wire reliability requirement to qualify copper wire packages. Many of them extend the gold wire package reliability stress duration for copper wire as a safety factor during the qualification. Our study is aimed for the assembly solution to apply copper wires on low-k-copper wafers with aggressive Freescale Bond Over Active (BOA) rules to meet automotive qualification requirements of Automotive Electronics Council (AEC) grade 1 and grade 0. Two types of bonding surfaces were used in this study, namely the conventional aluminum bond pad and aluminum bond pad remetallized with Nickel / Palladium / Gold Over Pad Metallurgy (OPM). Since Cu-Al and Cu-Au systems are completely different from Au-Al system, the difficulty in applying the same Au wire standards to copper wire parts will be discussed. A new approach to defining the pass/ fail criteria for copper wire parts will be proposed in this study. Units assembled with fine gauge copper wire were submitted through extensive stress conditions in order to demonstrate the excellent package reliability performance.


Archive | 1993

Area array semiconductor device having a lid with functional contacts

Leo M. Higgins


Archive | 1995

Pad array semiconductor device having a heat sink with die receiving cavity

Leo M. Higgins


Archive | 1993

Method for testing a semiconductor device on a universal test circuit substrate

Leo M. Higgins


Archive | 1991

Semiconductor device having a particular lid means and encapsulant to reduce die stress

Leo M. Higgins


Archive | 1995

Method for making a tab semiconductor device with self-aligning cavity and intrinsic standoff

Leo M. Higgins


Archive | 2000

Method of forming semiconductor device having a sub-chip-scale package structure

Leo M. Higgins


ECTC | 2011

Copper Wire Bonding on Low-k/Copper Wafers with Bond Over Active (BOA) Structures for Automotive Customers

Tu Anh Tran; Chu-Chung Lee; Varughese Mathew; Leo M. Higgins


Archive | 2011

Semiconductor device with protective material and method for encapsulating

Leo M. Higgins

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Tu Anh Tran

Freescale Semiconductor

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Nhat D. Vo

Freescale Semiconductor

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