Mary Y. Chen

InP HBT integrated circuit technology with selectively implanted subcollector and regrown device layers

We describe a quasi-planar HBT process using a patterned implanted subcollector with a regrown MBE device layer. Using this process, we have demonstrated discrete SHBT with f/sub t/>250 GHz and DHBT with f/sub t/>230 GHz. The process eliminates the need to trade base resistance for extrinsic base/collector capacitance. Base/collector capacitance was reduced by a factor of 2 over the standard mesa device with a full overlap between the heavily doped base and subcollector regions. The low proportion of extrinsic base/collector capacitance enables further vertical scaling of the collector even in deep submicrometer emitters, thus allowing for higher current density operation. Demonstration ring oscillators fabricated with this process had excellent uniformity and yield with gate delay as low as 7 ps and power dissipation of 6 mW/CML gate. At lower bias current, the power delay product was as low as 20 fJ. To our knowledge, this is the first demonstration of high-performance HBTs and integrated circuits using a patterned implant on InP.

Patterned n+ implant into InP substrate for HBT subcollector

We demonstrate molecular-beam epitaxy (MBE)-grown heterojunction bipolar transistors (HBTs) on InP substrates with a patterned implant n+ subcollector below the epitaxial layers. Device layers grown on implanted/annealed substrates were of similar quality to those on virgin InP. Maximum f/sub t/ and f/sub max/ of 240 and 310 GHz were obtained. We present the process flow, details of the ion implantation, layer characterization, and device results.

Investigation Into the Scalability of Selectively Implanted Buried Subcollector (SIBS) for Submicrometer InP DHBTs

Recent attempts to achieve 400 GHz or higher f_T and f _MAX with InP heterojunction bipolar transistors (HBTs) have resulted in aggressive scaling into the deep submicrometer regime. In order to alleviate some of the traditional mesa scaling rules, several groups have explored selectively implanted buried subcollectors (SIBS) as a means to decouple the intrinsic and extrinsic collector design. This allows tau_C to be minimized without incurring a large total C_BC increase, and hence, a net improvement in f_T and f_MAX is achieved. This paper represents the first investigation into the series resistance and capacitance characteristics of submicrometer-width SIBS regions (as narrow as 350 nm) for InP double HBTs. Although the SIBS resistance is higher than that of epitaxially grown layers, the SIBS concept is able to provide good dopant activation and a significant decrease in C_BC. S-parameter measurements are presented to clarify the impact of SIBS geometry variations, caused by both intentional device design and process variations, on f_T and f_MAX. Parasitic resistances and high background doping limit the f_T improvement, but the C_BC reduction is sufficient to demonstrate a 30% increase in f_MAX. Results indicate that further improvements in f_T and f_MAX using the SIBS concept will be possible

Re-growth of transistors on implanted InP

We have developed a process for the re-growth of InP-DHBTs on selectively implanted subcollectors for the purpose of reducing the base-collector capacitance. Si+ sub-collector implants were performed at >200degC to minimize damage, an important criterion for achieving smooth morphologies in the re-grown devices. Spectroscopic ellipsometry was used to gauge the amount of implant-induced damage in InP. The wafers were annealed in a MOCVD system in a PH3 ambient to activate the implanted Si dopant. DHBT re-growths on wafers processed under the optimal implant, annealing and re-growth conditions exhibited smooth morphologies. For these wafers, the field region of the re-grown transistor was indistinguishable from re-growth in the implanted region, when observed under a Nomarski optical microscope. Using the selective implant and re-growth process we have demonstrated significant reduction of the base collector capacitance in InP DHBTs. The base-collector capacitance was reduced by a factor of two over the standard mesa device with full overlap between heavily doped base and sub-collector regions