Michael A. Carcasi

Mesoscale modeling: a study of particle generation and line-edge roughness

Abstract. A lattice-type Monte Carlo–based mesoscale model and simulation of the lithography process have been adapted to study the insoluble particle generation that arises from statistically improbable events. These events occur when there is a connected pathway of soluble material that envelops a volume of insoluble material due to fluctuations in the deprotection profile. The simulation shows that development erodes the insoluble material into the developer stream and produces a cavity on the line edge that can be far larger than a single polymer molecule. The insoluble particles can coalesce to form aggregates that deposit on the wafer surface. The effect of the resist formulation, exposure, postexposure bake, and development variables on particle generation was analyzed in both low- and high-frequency domains. It is suggested that different mechanisms are dominant for the formation of line-edge roughness (LER) at different frequencies. The simulations were used to assess the commonly proposed measures to reduce LER such as the use of low molecular weight polymers, addition of quenchers, varying acid diffusion length, etc. The simulation can be used to help set process variables to minimize the extent of particle generation and LER.

Challenge toward breakage of RLS trade-off for EUV lithography by Photosensitized Chemically Amplified Resist (PSCAR) with flood exposure

This paper proposes a promising approach to break the resolution (R), line-edge-roughness (LER), and sensitivity (S) trade-off (RLS trade-off) relationships that limit the ultimate lithographic performance of standard chemically amplified resists (CAR). This is accomplished in a process that uses a Photosensitized Chemically Amplified Resist (PSCAR) in combination with a flood-exposure in an in-line track connected to a pattern exposure tool. PSCAR is a modified CAR which contains a photosensitizer precursor (PP) in addition to other standard CAR components such as a protected polymer, a photo acid generator (PAG) and a quencher. In this paper, the PSCAR concept and the required conditions in resist formulation are carefully explained. In the PSCAR process, the sensitivity improvement is accomplished by PAG decomposition to selectively generate more acid at the pattern exposed areas during the flood exposure. The selective photosensitization happens through the excitation of the photosensitizer (PS) generated by the deprotection of the PP at the pattern exposed areas. A higher resist chemical gradient which leads to an improved resolution and lower LER values is also predicted using the PSCAR simulator. In the PSCAR process, the improved chemical gradient can be realized by dual acid quenching steps with the help of increased quencher concentration. Acid quenching first happens simultaneously with acid catalytic PP to PS reactions. As a result, a sharpened PS latent image is created in the PSCAR. This image is subsequently excited by the flood exposure creating additional acid products at the pattern exposed areas only. Much the same as in the standard CAR system, unnecessary acid present in the non-pattern exposed areas can be neutralized by the remaining quencher to therefore produce sharper acid latent images. EUV exposure results down to 15 nm half pitch (HP) line/space (L/S) patterns using a PSCAR resist indicate that the use of PSCAR has the potential to improve the sensitivity of the system while simultaneously improving the line-width-roughness (LWR) with added quencher and flood exposure doses. In addition, improved across-wafer critical dimension uniformity (CDU) is realized by the use of a PSCAR in combination with a flood exposure using pre α UV exposure module.

Fabrication of 32-nm contact/via hole by photolithographic-friendly method

As semiconductor design rules continue to shrink, studies have begun on the 32nm-node and 22nm-node generations in semiconductor lithography technology in conjunction with the development of various fine-processing technologies. Research has been especially active in the development of high-NA193nm immersion lithography and EUV lithography for 32nm processes and beyond, but at the present stage of development, many technical issues have been reported. For example, in the contact-hole and via-hole pattern formation process in 193nm immersion lithography, it is difficult to maintain good resolution performance and process margins compared to line and space patterns. Poor resolution and other defects in the lithography process are major factors behind reduced yields in semiconductor production lines, and to prevent such defects, studies have begun on double patterning technology and shrink technology applied after resist-hole-pattern formation. Here, however, the need for reducing production processes and production costs have become major issues. In response to these technical issues, we evaluated a variety of hole-shrink processes as candidates for a fine-hole-pattern formation technology, and as a result of this study, we succeeded in applying an original hole-shrink technology to the formation of 40nm hole patterns and beyond.

Defectivity reduction by optimization of 193-nm immersion lithography using an interfaced exposure-track system

As the integration of semiconductor devices continues, pattern sizes required in lithography get smaller and smaller. To achieve even more scaling down of these patterns without changing the basic infrastructure technology of current cutting-edge 193-nm lithography, 193-nm immersion lithography is being viewed as a powerful technique that can accommodate next-generation mass productions needs. Therefore this technology has been seriously considered and after proof of concept it is currently entering the stage of practical application. In the case of 193-nm immersion lithography, however, because liquid fills the area between the projection optics and the silicon wafer, several causes of concern have been raised - namely, diffusion of moisture into the resist film due to direct resist-water interaction during exposure, dissolution of internal components of the resist into the de-ionized water, and the influence of residual moisture generated during exposure on post-exposure processing. To prevent these unwanted effects, optimization of the three main components of the lithography system: materials, track and scanner, is required. For the materials, 193nm resist formulation improvements specifically for immersion processing have reduced the leaching and the sensitivity to water related defects, further benefits can be seen by the application of protective top coat materials. For the track component, optimization of the processing conditions and immersion specific modules are proven to advance the progress made by the material suppliers. Finally, by optimizing conditions on the 3rd generation immersion scanner with the latest hardware configuration, defectivity levels comparable to dry processing can be achieved. In this evaluation, we detail the improvements that can be realized with new immersion specific track rinse modules and formulate a hypothesis for the improvements seen with the rinsing process. Additionally, we show the current status of water induced immersion specific defect reduction using the latest advances in technology.

Photosensitized Chemically Amplified Resist (PSCAR) 2.0 for high-throughput and high-resolution EUV lithography: dual photosensitization of acid generation and quencher decomposition by flood exposure

A new type of Photosensitized Chemically Amplified Resist (PSCAR) **: “PSCAR 2.0,” is introduced in this paper. PSCAR 2.0 is composed of a protected polymer, a “photo acid generator which can be photosensitized” (PS-PAG), a “photo decomposable base (quencher) which can be photosensitized” (PS-PDB) and a photosensitizer precursor (PP). With this PSCAR 2.0, a photosensitizer (PS) is generated by an extreme ultra-violet (EUV) pattern exposure. Then, during a subsequent flood exposure, PS selectively photosensitizes the EUV exposed areas by the decomposition of a PS-PDB in addition to the decomposition of PS-PAG. As these pattern-exposed areas have the additional acid and reduced quencher concentration, the initial quencher loading in PSCAR 2.0 can be increased in order to get the same target critical dimensions (CD). The quencher loading is to be optimized simultaneously with a UV flood exposure dose to achieve the best lithographic performance and resolution. In this work, the PSCAR performance when different quenchers are used is examined by simulation and exposure experiments with the 16 nm half-pitch (HP) line/space (L/S, 1:1) patterns. According to our simulation results among resists with the different quencher types, the best performance was achieved by PSCAR 2.0 using PS-PDB with the highest possible chemical gradient resulting in the lowest line width roughness (LWR). PSCAR 2.0 performance has furthermore been confirmed on ASML’s NXE:3300 with TEL’s standalone pre-alpha flood exposure tool at imec. The initial PSCAR 2.0 patterning results on NXE:3300 showed the accelerated photosensitization performance with PS-PDB. From these results, we concluded that the dual sensitization of PS-PAG and PS-PDB in PSCAR 2.0 have a potential to realize a significantly improved resist performance in EUV lithography.

Line-pattern collapse mitigation status for EUV at 32nm HP and below

Line pattern collapse (LPC) becomes a critical concern as integrated circuit fabrication continues to advance towards the 22 nm node and below. Tokyo Electron Limited (TEL) has been investigating LPC mitigation methods for many years [1]. These mitigation methods include surfactant rinses to help reduce surface tension and Laplace pressures forces that accompany traditional DIW rinses. However, the ability to explore LPC mitigation techniques at EUV dimensions is experimentally limited by the cost and availability of EUV exposures. With this in mind, TEL has adopted a combined experimental and simulation approach to further explore LPC mitigation methods. Several analytical models have been proposed [2, 3, 4] for a LPC simulation approach. However, the analytical models based on Euler beam theory are limited in the complexity of profile and material assumptions. Euler beam based models are also now questionable because they are outside the beam theorys intended aspect ratio regime [5]. The authors explore the use of finite element models in addition to Euler beam theory based models to understand resist collapse under typical EUV patterning conditions. The versatility of current finite element techniques allows for exploration of resist material property effects, profile and geometry effects, surface versus bulk modulus effects, and rinse and surfactant rinse effects. This paper will discuss pattern-collapse trends and offers critical learning from this simulation approach combined with experimental results from an EUV exposure system and TEL CLEAN TRACK ACTTM 12 platform, utilizing state of the art collapse mitigation methods.

Extension of 248 nm Monte Carlo, mesoscale models to 193 nm platforms

Current minimum feature sizes in the microelectronics industry dictate that molecular interactions affect process fidelity and produce stochastic excursions like line edge roughness (LER). The composition of future resists is still unknown at this point, and so simulation of various resist platforms should provide useful information about resist design that minimizes LER. In the past, researchers developed a mesoscale model for exploring representative 248 nm resist systems through dynamic Monte Carlo methods and adaptation of critical ionization theory. This molecular modeling uses fundamental interaction energies combined with a Metropolis algorithm to model the full lithographic process (spin coat, PAB, exposure, PEB, and development). Application of this model to 193 nm platforms allows for comparison between 248 and 193 nm resist systems based on molecular interactions. This paper discusses the fundamental modifications involved in adapting the mesoscale model to a 193 nm platform and investigates how this new model predicts well-understood lithographic phenomena including the relationship between LER and aerial image, the relationship between LER and resist components, and the impact of non-uniform PAG distribution in the resist film. Limited comparisons between the 193 nm system and an analogous 248 nm platform will be discussed.

Process-induced bias: a study of resist design and process implications

Critical dimension uniformity (CDU) has both across field and across wafer components. CD error generated by across wafer etching non-uniformity and other process variations can have a significant impact on CDU. To correct these across wafer variations, compensation by exposure dose and/or PEB temperature, have been proposed. These compensation strategies often focus on a specific structure without evaluating how process compensation impacts the CDU of all structures to be printed in a given design. In a previous study, the authors evaluated the relative merits of across wafer dose and PEB temperature compensation on the process induced CD bias and CDU. For the process studied, both metrics demonstrated that using PEB temperature to control across wafer CD variation was preferable to using dose compensation. The previous study was limited to a single resist and variations to track and scanner processing were kept to a minimum. Further examination of additional resist materials has indicated that significant variation in dose and PEB temperature induced CD biases exist from material to material. It is the goal of this work to understand how resist design, as well as track and scanner processing, impact process induced bias (PIB). This is accomplished by analyzing full resist models for a range of resists that exhibit different dose and PEB temperature PIB behavior. From these models, the primary resist design contributors to PIB are isolated. A sensitivity analysis of the primary resist design as well as track and scanner processing effects will also be simulated and presented.

Constructing a robust PSCARTM process for EUV (Conference Presentation)

In order to lower the cost of ownership of EUV lithography, high sensitivity EUV resists , enabling higher throughput of EUV scanners are being explored. The concept that utilizes a Photosensitized Chemically Amplified ResistTM (PSCARTM) is a promising solution for achieving increased resist sensitivity, while maintaining other high performance characteristics of the material (i.e., resolution, line edge roughness (LER), exposure latitude). PSCAR uses a UV exposure after EUV exposure and selective absorption to meet these goals . Preliminary results have been discussed in previous papers 1-8. PSCAR utilizes an area-selective photosensitization mechanism to generate more acid in the exposed areas during a UV exposure. PSCAR is an attempt to break the resolution, line-edge-roughness, and sensitivity trade-off (RLS trade-off) relationships that limit standard chemically amplified resists. The photosensitizer, which is generated in exposed area by a photoacid catalytic reaction, absorbs the UV exposure light selectively and generates additional acid in the exposed area only. Material development and UV exposure uniformity are the key elements of PSCAR technology for semiconductor mass fabrication. This paper will review the approaches toward improvement of PSCAR resist process robustness. The chemistry’s EUV exposure cycle of learning results from experiments at imec will be discussed.

EUV resist sensitization and roughness improvement by PSCAR with in-line flood exposure system (Conference Presentation)

Photosensitized Chemically Amplified ResistTM (PSCARTM) **2.0’s advantages and expectations are reviewed in this paper. Alpha PSCAR in-line UV exposure system (“Litho Enhancer”) was newly installed at imec in a Tokyo Electron Ltd. (TELTM)’s CLEAN TRACKTM LITHIUS ProTM Z connected to an ASML’s NXE:3300. Using the Litho Enhancer, PSCAR 2.0 sensitization preliminary results show that suppression of roughness enhancement may occur while sensitivity is increased. The calibrated PSCAR 2.0 simulator is used for prediction of resist formulation and process optimization. The simulation predicts that resist contrast enhancement could be realized by resist formulation and process optimization with UV flood exposure.