Nejdat Demirel

Millimeter-wave chip set for 77–81 GHz automotive radar application

A millimeter-wave (mmW) chipset for 77–81 GHz automotive radar has been developed in 0.13μm SiGe HBT technology. This work presents the performances of an integrated Low Noise Amplifier (LNA), a Power Amplifier (PA), a down-converting Mixer, and also a Voltage Controlled Oscillator (VCO). For successful implementation of the circuit, considerations on the reliability of the design have been taken into account. Measurements on all circuits confirm the feasibility of mmW front-end using silicon based technologies for W-band application.

A Broadband 4.5–15.5-GHz SiGe Power Amplifier With 25.5-dBm Peak Saturated Output Power and 28.7% Maximum PAE

This paper presents the design of a broadband power amplifier (PA) in 130-nm SiGe BiCMOS technology. First, a single-stage broadband single-cell PA covering the 4.5-18-GHz frequency band is introduced. In this frequency range, this single cell achieves a measured gain, saturated output power ( Psat), output 1-dB compression point ( P1dB), and power-added efficiency (PAE) in the range from 12.8 to 15.7 dB, 18.8 to 23.7 dBm, 16.7 to 19.5 dBm, and 11.4 to 31.9%, respectively. Its peak saturated output power and maximum PAE are both obtained at 8.5 GHz. Second, to increase the output power, a PA consisting of two parallel broadband cells with a power combination is presented. This PA operates in the 4.5-15.5-GHz frequency range with measured gain, Psat, P1dB, and PAE in the range from 11 to 16.6 dB, 21.3 to 25.5 dBm, 18.7 to 21.7 dBm, and 11.9 to 28.7%, respectively. It achieves its peak saturated output power of 25.5 dBm at 8.5 GHz and its maximum PAE of 28.7% with an associated output power of 23.6 dBm at 6.5 GHz. Each of those two PAs achieves better performances than the state-of-the-art in broadband SiGe technology when comparing the output power level and efficiency.

Optimization of 65nm CMOS passive devices to design a 16 dBm-P sat 60 GHz power amplifier

The optimization of passive devices is performed to contribute to the design of a linear 60 GHz Power Amplifier (PA). The difficulty in this design consists in the use of thin digital 7 metal layers (1P7M) Back End of Line (BEOL) and Low Power (LP) transistors dedicated for pure digital applications. In this context, compact inductors and Transmission lines (T-lines) are analyzed, measured and compared at millimeter-Wave (mmW) frequencies. Moreover, a technique of Common Mode Rejection Ration (CMRR) improvement applied for baluns is presented and validated with measurements. A Parallel PA that combines 8 high-efficiency unit power cells is designed using 65nm CMOS technology from STMicroelectronics. The experimental results show a saturated output power (Psat) of 16 dBm with a 14 dBm 1dB-output compression point (OCP1dB).

Optimized power combining technique to design a 20dB gain, 13.5dBm OCP1 60GHz power amplifier using 65nm CMOS technology

Millimeter-wave Distributed Active Transformer (DAT), baluns and zero degree 1-4 splitter have been optimized to design a 60 GHz parallel Power Amplifier (PA). The implementation is based on a thin digital 7 metal layers (1P7M) Back End of Line (BEOL) and Low Power (LP) transistors in 65 nm CMOS technology from STMicroelectronics. A lumped model based analysis is presented to compare pure voltage and mixed voltage and current combining techniques. Simulated and measured results are reported. At 61 GHz, the PA achieves a peak power gain of 20 dB with a 13.5 dBm 1dB-output compression point (OCP1dB), 15.6 dBm output power and a Power Added Efficiency (PAE) of 6.6% from a 1.2 V supply. To the authors knowledge, these results represent the highest linear output power and gain performances among PAs using the same technology.

Design techniques and considerations for mmwave SiGe power amplifiers

This paper describes the techniques to design a SiGe power amplifier (PA) for millimeter wave (mmW) applications. The design methodology of a balanced four-stage common emitter circuit topology was reported. The power amplifier was fully integrated including matching elements and bias circuit. The matching networks use coplanar waveguide (CPW) lines and MIM capacitors. Design considerations including parasitic elements, interconnections, pad model and matching structures are detailed. All these elements are taken into account to optimize the maximum output power. A comparison of the simulated and measured small-signal results is presented up to 110 GHz. The simulated and measured large-signal parameters are shown at 60, 65 and 77 GHz.

A Study of High-Frequency Bandpass Delta-Sigma Transmitter Architectures

This paper proposes a novel architecture to realise a highly-efficient and linear bandpass (BP) delta-sigma (DeltaSigma) transmitter. The novel transmitter topology takes advantage of the fact that nowadays digital signals are in-phase (/) and quadrature (Q) modulated. Instead of using the combined signal, the proposed architecture processes the RF I and Q signals in two separate branches and combines them only prior transmission over the antenna. Doing so has several benefits in regard to practical implementation since the signal bandwidths in the proposed system are narrower than in the conventional architecture. Simulations of such a transmitter using GaAs FETs highlights the potential of the novel RF I/Q BPDeltaSigma architecture as it features high-linearity as well as better signal-to-noise ratio than the conventional topology.

Dual-mode power amplifier module with in-band reconfigurable output power for multifunctional radar and radio communication systems

This paper presents a concept of dual-mode power amplifier (PA) module with in-band reconfigurable gain and output power. In the first mode, a wideband PA delivers a medium output power. This operational mode is particularly appropriate for ultra-wideband or multi-standard radio communication. In the second mode, a high power amplifier is turned on in order to deliver a high power signal within a sub-band for enhanced radar operation. This second mode allows both amplifiers to operate simultaneously in order to provide continuous service in sidebands. To demonstrate this concept, a network integrating a wideband medium output power PA and a narrowband high power PA is proposed. Both PA are based on low cost SiGe technology and optimized for maximum output power and Power Added Efficiency (PAE) in their operating frequency range. Simulated and measured results of a Printed Circuit Board (PCB) demonstrator validate the concept. The proposed sub-system would be of a great interest for multifunctional radar and radio communication systems.

A 24 GHz, 18 dBm fully integrated power amplifier in a 0.13μm SiGe HBT technology

A 24 GHz, +18.0 dBm fully-integrated power amplifier (PA) with 50 Omega input and output matching is designed in 0.13 mum SiGe BiCMOS process. The power amplifier features a peak power gain of 7.8 dB with 15.89 dBm output power at 1 dB compression and a maximum single-ended output power of +18.0 dBm with 25.9% of power-added efficiency (PAE). The power amplifier uses a single 1.8 V supply and was fully integrated (including matching elements and bias circuit). The matching networks use inductors and MIM capacitors for high integration purpose, the circuit occupies a small area of 0.3 mm2 (including pads and matching networks).