Ngoc V. Le

Fabrication of a surface acoustic wave-based correlator using step-and-flash imprint lithography

We report the surface acoustic wave (SAW) correlator devices fabricated using nanoimprint lithography. Using step-and-flash imprint lithography (S-FIL), we produced SAW correlator devices on 100mm diameter z-cut LiNbO3 devices and an aluminum metal etch process. On the same chip layout, we fabricated SAW filters and compared both the filters and correlators to similar devices fabricated using electron-beam lithography (EBL). Both S-FIL- and EBL-patterned correlators and SAW filters were analyzed using a bit-error rate tester to generate the signal and a parametric signal analyzer to evaluate the output. The NIL filters had an average center frequency of 2.38GHz with a standard deviation of 10MHz. The measured insertion loss averaged −31dB. In comparison, SAW filters fabricated using EBL exhibited a center frequency of 2.39GHz and a standard deviation of 100kHz. Based on our preliminary results, we believe that S-FIL is an efficient and entirely viable fabrication method to produce quality SAW filters and ...

Repair of step and flash imprint lithography templates

In order for step and flash imprint lithography (S-FIL) to become a truly viable manufacturing technology, infrastructure including template repair must be commercially available. Extensive template repair studies were undertaken using RAVE’s nm 650 tool which is predicated on an AFM platform and relies upon a nanomachining technique for opaque defect removal. On S-FIL templates, the standard deviation for depth repairs in quartz from the target depth was found to be 3.1nm (1σ). At 21.5nm (1σ), the analogous spread in edge placement data for opaque line protrusions was somewhat higher. Trench cuts through lines were successfully created with a minimum size of about 55nm. The effectiveness of the repairs on the template was verified by imprinting experiments. The range of depth offsets studied (−15to+15nm) had no bearing on the imprinting process. The edge placement on wafers virtually mirrored the edge placement of the repaired templates. Connections between features which were created by trench cuts on t...

Sub-80-nm contact hole patterning using Step and Flash Imprint Lithography

Recently, the International Roadmap for Semiconductors (ITRS) has included imprint lithography on its roadmap, to be ready for production use in 2013 at the 32 nm node. Step and Flash Imprint Lithography (S-FILTM) is one of the promising new methods of imprint lithography being actively developed. Since S-FIL is a 1X printing technique, fabrication of templates is especially critical. S-FIL has previously demonstrated the ability to reliably print high resolution line/space and contact hole features into a silicon-rich etch barrier material. Beyond printing with S-FIL however, there is the requirement to develop low or zero bias, high selectivity dry etch processes needed to transfer printed images into the substrate. In this study, the feasibility and methodology of imprinting sub-80 nm contacts, and pattern transferring this image into an underlying oxide layer is demonstrated. Critical parameters such as e-beam dose and etch biases associated with template pillar fabrication, and biases associated with pattern transfer processes for sub-80 nm 1:1 and 1:2 pitch contacts are discussed. Wafer imprinting was done on 200 mm wafers using Molecular Imprints Inc., Imprio 100TM system.

An electrical defectivity characterization of wafers imprinted with step and flash imprint lithography

For the first time, electrically testable snake and comb structures were used to quantitatively characterize the defectivity associated with imprint lithography, specifically with Step and Flash Imprint Lithography. Whereas the overall yield for quarter micron optically-patterned snakes was found to be approximately 95%, the corresponding value for imprinted snakes was about 84%. The yield of imprinted snakes was found to fall rapidly with decreasing feature size. For example, the yield of 1:5 50 nm short snakes was only about 55%. Complementary optical inspection suggested feature pullout (release agent failure and mechanical layer separation) was a prevailing occurrence. Qualitatively, defects were binned into four primary, broad categories: self-cleaning template defects; non self-cleaning template defects; imprint-impeding defects; and template damaging defects. Additionally, the template cleaning process employed was found to be fairly efficient at removing particles, particularly when considering defects at the larger feature sizes. There is no doubt that the control of defectivity will be the next large hurdle that will challenge imprint lithography as it strives to make inroads in manufacturing arenas. Finally, a future study is planned with improved etch barrier and transfer layers.

Imprint technology: A potential low-cost solution for sub-45nm device applications

Nano-imprint technology has demonstrated the potential for a low-cost, high-throughput Next Generation Lithography (NGL) method extendable to ultra-fine geometry requirements. Although the development of nano-imprinting lithography has been focused on semiconductor applications, the technology could provide a pathway for non-semiconductor-related applications as well. Examples of technologies that may benefit from this nano-imprint are high-density drives and other stand-alone memories, organic and flexible electronics, photonics, nanoelectronics, biotechnology, etc. With the rapid advances in these industries, the need for sub-nanometer features to drive performance and innovation, while maintaining cost, is to be expected. Step and Flash Imprint Lithography (S-FILTM) is one of several cost-effective imprinting technologies being pursued for sub-100 nm resolution. In demonstrating successful final pattern transfer of features less than 45 nm, S-FIL has sparked some interest as a viable alternative to other NGL methods. Unlike optical-based lithography, imprint utilizes the basic concept of contact printing, and therefore, does not require expensive optics and complex resist material to create images. Thus, the cost of ownership for nano-imprint lithography compared with other optical-based NLGs could provide solutions for many applications. Improvements made in S-FIL in the areas of material dispensing and refinement of the etch barrier (EB) have resulted in more uniform printing while producing a thinner residual layer. These improvements, coupled with changes to the etch processes have enabled pattern transfer with minimal critical dimension (CD) loss. This paper will describe both the new imprinting results and pattern transfer to demonstrate sub-45nm features. CD bias at each of the process steps will also be discussed. Examples of sub-45 nm (1:3) line/space features post imprint and final pattern transfer into oxide will be shown.

Fabrication of a monolithically integrated multiple wavelength Fabry-Perot filter array using transparent etch stop layers for accurate wavelength determination

In this paper we describe a method of fabricating a Fabry-Perot filter array consisting of four distinct wavelengths using a stopping layer, which in turn is discriminately measured. Precise control of the oxide thickness is demonstrated by using reflectance to measure center wavelengths (CWL) between 645nm-822nm with full width half maximum (FWHM) values of 15 nm. These parameters are used to confirm good narrow band filter characteristics. The physical and chemical properties of an oxide layer converted from a silicon-carbon-nitride (SiCN) etch stop layer (ESL) is reported for both as-deposited and the resultant oxidized film. The filter array can be fabricated directly on top of silicon photo diodes, to form a complete multi-wavelength sensor system. Fabricating a multi-wavelength filter array using etch-stop layers can provide better thickness control and across wafer uniformity compared to a timed-etch approach.